aboutsummaryrefslogtreecommitdiff
path: root/drivers/reset
diff options
context:
space:
mode:
authorSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>2019-03-01 20:12:30 +0100
committerMarek Vasut <marex@denx.de>2019-04-17 22:20:16 +0200
commit1ea975010df4dd1568361db3cd699860f73e750d (patch)
tree4e5a7731a8e197c2d314ad0b3f8ca8d4d6839a0a /drivers/reset
parent7357c2cbc0b4c4c0cf2d6fa1253cda6f77cf06da (diff)
downloadu-boot-1ea975010df4dd1568361db3cd699860f73e750d.zip
u-boot-1ea975010df4dd1568361db3cd699860f73e750d.tar.gz
u-boot-1ea975010df4dd1568361db3cd699860f73e750d.tar.bz2
reset: socfpga: rename membase ptr to modrst_base
The only member of this driver's priv struct is a pointer, which is called 'membase'. However, since this driver handles multiple sub- architectures, this is not the base address from dts but the base address of some common registers of those sub-arches. Reflect this better in sourcecode by renaming 'membase' to 'modrst_base'. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'drivers/reset')
-rw-r--r--drivers/reset/reset-socfpga.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index b2acfcd..244db51 100644
--- a/drivers/reset/reset-socfpga.c
+++ b/drivers/reset/reset-socfpga.c
@@ -24,7 +24,7 @@
#define NR_BANKS 8
struct socfpga_reset_data {
- void __iomem *membase;
+ void __iomem *modrst_base;
};
static int socfpga_reset_assert(struct reset_ctl *reset_ctl)
@@ -35,7 +35,7 @@ static int socfpga_reset_assert(struct reset_ctl *reset_ctl)
int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
- setbits_le32(data->membase + (bank * BANK_INCREMENT), BIT(offset));
+ setbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
return 0;
}
@@ -47,7 +47,7 @@ static int socfpga_reset_deassert(struct reset_ctl *reset_ctl)
int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
- clrbits_le32(data->membase + (bank * BANK_INCREMENT), BIT(offset));
+ clrbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
return 0;
}
@@ -80,11 +80,12 @@ static int socfpga_reset_probe(struct udevice *dev)
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
u32 modrst_offset;
+ void __iomem *membase;
- data->membase = devfdt_get_addr_ptr(dev);
+ membase = devfdt_get_addr_ptr(dev);
modrst_offset = fdtdec_get_int(blob, node, "altr,modrst-offset", 0x10);
- data->membase += modrst_offset;
+ data->modrst_base = membase + modrst_offset;
return 0;
}