aboutsummaryrefslogtreecommitdiff
path: root/drivers/pci
diff options
context:
space:
mode:
authorSuneel Garapati <sgarapati@marvell.com>2019-10-23 18:40:36 -0700
committerStefan Roese <sr@denx.de>2020-08-25 08:01:16 +0200
commita3fac3f395afc5ad7aeb01fb7ed2d87d07c87ab0 (patch)
tree3acf8430dfd9d1043c2c1117877353841470c1cb /drivers/pci
parent51eeae91c5e7b8f7c1bdf46aa6d6bb1675fd2ebc (diff)
downloadu-boot-a3fac3f395afc5ad7aeb01fb7ed2d87d07c87ab0.zip
u-boot-a3fac3f395afc5ad7aeb01fb7ed2d87d07c87ab0.tar.gz
u-boot-a3fac3f395afc5ad7aeb01fb7ed2d87d07c87ab0.tar.bz2
pci: pci-uclass: Add support for Alternate-RoutingID capability
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/Kconfig9
-rw-r--r--drivers/pci/pci-uclass.c26
2 files changed, 35 insertions, 0 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 4635752..377806f 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -63,6 +63,15 @@ config PCI_SRIOV
if available on a PCI Physical Function device and probe for
applicable drivers.
+config PCI_ARID
+ bool "Enable Alternate Routing-ID support for PCI"
+ depends on PCI || DM_PCI
+ default n
+ help
+ Say Y here if you want to enable Alternate Routing-ID capability
+ support on PCI devices. This helps to skip some devices in BDF
+ scan that are not present.
+
config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support"
default n
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 23135eb..fc60dfe 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -798,6 +798,7 @@ int pci_bind_bus_devices(struct udevice *bus)
ulong header_type;
pci_dev_t bdf, end;
bool found_multi;
+ int ari_off;
int ret;
found_multi = false;
@@ -871,6 +872,31 @@ int pci_bind_bus_devices(struct udevice *bus)
pplat->vendor = vendor;
pplat->device = device;
pplat->class = class;
+
+ if (IS_ENABLED(CONFIG_PCI_ARID)) {
+ ari_off = dm_pci_find_ext_capability(dev,
+ PCI_EXT_CAP_ID_ARI);
+ if (ari_off) {
+ u16 ari_cap;
+
+ /*
+ * Read Next Function number in ARI Cap
+ * Register
+ */
+ dm_pci_read_config16(dev, ari_off + 4,
+ &ari_cap);
+ /*
+ * Update next scan on this function number,
+ * subtract 1 in BDF to satisfy loop increment.
+ */
+ if (ari_cap & 0xff00) {
+ bdf = PCI_BDF(PCI_BUS(bdf),
+ PCI_DEV(ari_cap),
+ PCI_FUNC(ari_cap));
+ bdf = bdf - 0x100;
+ }
+ }
+ }
}
return 0;