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| author | Philippe Schenker <philippe.schenker@toradex.com> | 2020-03-11 11:52:58 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-05-01 13:46:22 +0200 |
| commit | a1a34faef2fb8fa6a1c330b0a157934d24d0341d (patch) | |
| tree | b8c33c1bf7cb21be10101214813c41a3da654907 /drivers/net | |
| parent | f72e48ba4d987ee1d4252d9ce251f29a9980575d (diff) | |
| download | u-boot-a1a34faef2fb8fa6a1c330b0a157934d24d0341d.zip u-boot-a1a34faef2fb8fa6a1c330b0a157934d24d0341d.tar.gz u-boot-a1a34faef2fb8fa6a1c330b0a157934d24d0341d.tar.bz2 | |
net: fec: Add possibility to enable TXC delay
This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or
FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC
delay in the MAC.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/fec_mxc.c | 10 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.h | 2 |
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bc5b63d..345d37b 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -503,6 +503,16 @@ static int fec_open(struct eth_device *edev) writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); +#ifdef FEC_ENET_ENABLE_TXC_DELAY + writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_TXC_DLY, + &fec->eth->ecntrl); +#endif + +#ifdef FEC_ENET_ENABLE_RXC_DELAY + writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_RXC_DLY, + &fec->eth->ecntrl); +#endif + #if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) udelay(100); diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 159aec8..3c8fdda 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -188,6 +188,8 @@ struct ethernet_regs { #define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */ #define FEC_ECNTRL_SPEED 0x00000020 #define FEC_ECNTRL_DBSWAP 0x00000100 +#define FEC_ECNTRL_TXC_DLY 0x00010000 /* TXC delayed */ +#define FEC_ECNTRL_RXC_DLY 0x00020000 /* RXC delayed */ #define FEC_X_WMRK_STRFWD 0x00000100 |