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| author | Madalin Bucur <madalin.bucur@oss.nxp.com> | 2020-03-12 14:53:46 +0200 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-03-30 08:06:52 +0530 |
| commit | 4fb2264b284899f837ebb93c2c64c0c92226de0a (patch) | |
| tree | c39f161266e4a75745f6d4c99a0bbefaf4402371 /drivers/net | |
| parent | 00160cf32e6e3796afa6f74ec2a8e607cdbb8832 (diff) | |
| download | u-boot-4fb2264b284899f837ebb93c2c64c0c92226de0a.zip u-boot-4fb2264b284899f837ebb93c2c64c0c92226de0a.tar.gz u-boot-4fb2264b284899f837ebb93c2c64c0c92226de0a.tar.bz2 | |
armv8/ls1046ardb: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1046ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.
Fixes: cc1aa218f510 ("armv8/ls1046a: RGMII PHY requires internal
delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/fm/ls1046.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c index 3617ad9..49b540b 100644 --- a/drivers/net/fm/ls1046.c +++ b/drivers/net/fm/ls1046.c @@ -71,12 +71,12 @@ phy_interface_t fman_port_enet_if(enum fm_port port) if (port == FM1_DTSEC3) if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) == FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII) - return PHY_INTERFACE_MODE_RGMII_TXID; + return PHY_INTERFACE_MODE_RGMII_ID; if (port == FM1_DTSEC4) if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) == FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII) - return PHY_INTERFACE_MODE_RGMII_TXID; + return PHY_INTERFACE_MODE_RGMII_ID; /* handle SGMII, only MAC 2/5/6/9/10 available */ switch (port) { |