net: zynq: Add support for mdio bus address decoding

Xilinx DTS files are using two way how to describe ethernet phy.

The first (already supported) has phy as subnode of gem node.
eth {
        phy-handle = <&phy0>;
         phy0: ethernet-phy@21 {
                ...
        };
};

The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
        phy-handle = <&phy0>;
        mdio {
                phy0: ethernet-phy@21 {
                        ...
                };
        };
};

This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index c309c3c..de61321 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -802,6 +802,9 @@ static int zynq_gem_of_to_plat(struct udevice *dev)
 							  SPEED_1000);
 
 		parent = ofnode_get_parent(phandle_args.node);
+		if (ofnode_name_eq(parent, "mdio"))
+			parent = ofnode_get_parent(parent);
+
 		addr = ofnode_get_addr(parent);
 		if (addr != FDT_ADDR_T_NONE) {
 			debug("MDIO bus not found %s\n", dev->name);