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authorHiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>2020-03-07 17:32:59 +0100
committerPeng Fan <peng.fan@nxp.com>2020-04-21 10:12:15 +0800
commit902af10d67520bf5535b660bff2b28a98c194022 (patch)
treee9f727d7773d2a63ed2cf1b1ba0d7052b8866b68 /drivers/mmc
parente4837da7828293ea49abc579f939c0f5c4b127c3 (diff)
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mmc: tmio: sdhi: Add DMA transfer address alignment check at writing
In R-Car Gen 3, there is a DMA controller restriction of SDHI. When the transfer exceeding the 4 kByte boundary is performed while the DRAM address is not 128 byte aligned, the bus is occupied. This patch avoids this. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/tmio-common.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index faf1819..1dc13db 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -358,14 +358,16 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct mmc_data *data)
}
/* check if the address is DMA'able */
-static bool tmio_sd_addr_is_dmaable(const char *src)
+static bool tmio_sd_addr_is_dmaable(struct mmc_data *data)
{
- uintptr_t addr = (uintptr_t)src;
+ uintptr_t addr = (uintptr_t)data->src;
if (!IS_ALIGNED(addr, TMIO_SD_DMA_MINALIGN))
return false;
#if defined(CONFIG_RCAR_GEN3)
+ if (!(data->flags & MMC_DATA_READ) && !IS_ALIGNED(addr, 128))
+ return false;
/* Gen3 DMA has 32bit limit */
if (addr >> 32)
return false;
@@ -480,7 +482,7 @@ int tmio_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
if (data) {
/* use DMA if the HW supports it and the buffer is aligned */
if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL &&
- tmio_sd_addr_is_dmaable(data->src))
+ tmio_sd_addr_is_dmaable(data))
ret = tmio_sd_dma_xfer(dev, data);
else
ret = tmio_sd_pio_xfer(dev, cmd, data);