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| author | Fabien Parent <fparent@baylibre.com> | 2019-03-24 16:46:32 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-23 17:57:25 -0400 |
| commit | ba077e5f74500ec81e6ccdda4cba4078e1f3495b (patch) | |
| tree | 87e0cc867ea6488ab0eedae8ae14b8158d2e5072 /drivers/mmc/mtk-sd.c | |
| parent | 7c798a11d499dbf5c1c12eedec6bd7299b906b2b (diff) | |
| download | u-boot-ba077e5f74500ec81e6ccdda4cba4078e1f3495b.zip u-boot-ba077e5f74500ec81e6ccdda4cba4078e1f3495b.tar.gz u-boot-ba077e5f74500ec81e6ccdda4cba4078e1f3495b.tar.bz2 | |
mmc: mtk-sd: add source_cg clock support
Some MediaTek SoC need an additional clock "source_cg". Enable
this new clock. We reuse the same clock name as in the kernel.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Diffstat (limited to 'drivers/mmc/mtk-sd.c')
| -rw-r--r-- | drivers/mmc/mtk-sd.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index d3f0778..eed98b7 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -247,6 +247,7 @@ struct msdc_host { struct msdc_compatible *dev_comp; struct clk src_clk; /* for SD/MMC bus clock */ + struct clk src_clk_cg; /* optional, MSDC source clock control gate */ struct clk h_clk; /* MSDC core clock */ u32 src_clk_freq; /* source clock */ @@ -1269,6 +1270,8 @@ static void msdc_ungate_clock(struct msdc_host *host) { clk_enable(&host->src_clk); clk_enable(&host->h_clk); + if (host->src_clk_cg.dev) + clk_enable(&host->src_clk_cg); } static int msdc_drv_probe(struct udevice *dev) @@ -1332,6 +1335,8 @@ static int msdc_ofdata_to_platdata(struct udevice *dev) if (ret < 0) return ret; + clk_get_by_name(dev, "source_cg", &host->src_clk_cg); /* optional */ + #if IS_ENABLED(DM_GPIO) gpio_request_by_name(dev, "wp-gpios", 0, &host->gpio_wp, GPIOD_IS_IN); gpio_request_by_name(dev, "cd-gpios", 0, &host->gpio_cd, GPIOD_IS_IN); |