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| author | Chee Hong Ang <chee.hong.ang@intel.com> | 2020-08-07 11:50:03 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-10-09 17:53:12 +0800 |
| commit | d2170168dd9d762152f27c482faa87973a2fd791 (patch) | |
| tree | 15559369a370e82b25c38a0622f4656b0db0ea9d /drivers/fpga | |
| parent | 2473e13bb8e81cf90e89863125e85900193b01b7 (diff) | |
| download | u-boot-d2170168dd9d762152f27c482faa87973a2fd791.zip u-boot-d2170168dd9d762152f27c482faa87973a2fd791.tar.gz u-boot-d2170168dd9d762152f27c482faa87973a2fd791.tar.bz2 | |
fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'drivers/fpga')
| -rw-r--r-- | drivers/fpga/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/fpga/Makefile | 2 | ||||
| -rw-r--r-- | drivers/fpga/altera.c | 7 | ||||
| -rw-r--r-- | drivers/fpga/intel_sdm_mb.c (renamed from drivers/fpga/stratix10.c) | 2 |
4 files changed, 12 insertions, 11 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index fe398a1..dd0b39a 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -31,16 +31,16 @@ config FPGA_CYCLON2 Enable FPGA driver for loading bitstream in BIT and BIN format on Altera Cyclone II device. -config FPGA_STRATIX10 - bool "Enable Altera FPGA driver for Stratix 10" +config FPGA_INTEL_SDM_MAILBOX + bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver" depends on TARGET_SOCFPGA_STRATIX10 select FPGA_ALTERA help - Say Y here to enable the Altera Stratix 10 FPGA specific driver + Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver - This provides common functionality for Altera Stratix 10 devices. - Enable FPGA driver for writing bitstream into Altera Stratix10 - device. + This provides common functionality for Intel FPGA devices. + Enable FPGA driver for writing full bitstream into Intel FPGA + devices through SDM (Secure Device Manager) Mailbox. config FPGA_XILINX bool "Enable Xilinx FPGA drivers" diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 04e6480..83243fb 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -16,9 +16,9 @@ ifdef CONFIG_FPGA_ALTERA obj-y += altera.o obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o +obj-$(CONFIG_FPGA_INTEL_SDM_MAILBOX) += intel_sdm_mb.o obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o -obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c index bb27b37..10c0475 100644 --- a/drivers/fpga/altera.c +++ b/drivers/fpga/altera.c @@ -40,12 +40,13 @@ static const struct altera_fpga { #if defined(CONFIG_FPGA_STRATIX_V) { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL }, #endif -#if defined(CONFIG_FPGA_STRATIX10) - { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL }, -#endif #if defined(CONFIG_FPGA_SOCFPGA) { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL }, #endif +#if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX) + { Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL, + NULL }, +#endif }; static int altera_validate(Altera_desc *desc, const char *fn) diff --git a/drivers/fpga/stratix10.c b/drivers/fpga/intel_sdm_mb.c index da8fa31..3508231 100644 --- a/drivers/fpga/stratix10.c +++ b/drivers/fpga/intel_sdm_mb.c @@ -247,7 +247,7 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size, * This is the interface used by FPGA driver. * Return 0 for success, non-zero for error. */ -int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) +int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) { int ret; u32 resp_len = 2; |