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authorPatrick Delaunay <patrick.delaunay@st.com>2020-05-25 12:19:45 +0200
committerPatrick Delaunay <patrick.delaunay@st.com>2020-07-07 16:01:23 +0200
commit4e62642aef59ef89e00fe05ef1c27f263d80bcf6 (patch)
treeb36ad90b8fbfa2205d9da4218f2683be601531d6 /drivers/clk/clk_stm32mp1.c
parent37ad8377af00128adc47fb1192142ac9dfbf1f9d (diff)
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arm: stm32mp: add weak function to save vddcore
Add a weak functions to save the vddcore voltage value provided in the OPP node when the clock tree is initialized. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/clk/clk_stm32mp1.c')
-rw-r--r--drivers/clk/clk_stm32mp1.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 8acbad2..c8840b9 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -1229,6 +1229,10 @@ bool stm32mp1_supports_opp(u32 opp_id, u32 cpu_type)
}
}
+__weak void board_vddcore_init(u32 voltage_mv)
+{
+}
+
/*
* gets OPP parameters (frequency in KHz and voltage in mV) from
* an OPP table subnode. Platform HW support capabilities are also checked.
@@ -1306,6 +1310,7 @@ int stm32mp1_get_max_opp_freq(struct stm32mp1_clk_priv *priv, u64 *freq_hz)
return -FDT_ERR_NOTFOUND;
*freq_hz = (u64)1000U * freq;
+ board_vddcore_init(voltage);
return 0;
}