aboutsummaryrefslogtreecommitdiff
path: root/doc
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2008-07-15 22:22:44 +0200
committerWolfgang Denk <wd@denx.de>2008-07-15 22:22:44 +0200
commit699f05125509249072a0b865c8d35520d97cd501 (patch)
tree8d81f7f2f99c96196c5b5881beb45ed81a0909aa /doc
parentbcab74baa6b1b1c969038ab6f64a186239180405 (diff)
downloadu-boot-699f05125509249072a0b865c8d35520d97cd501.zip
u-boot-699f05125509249072a0b865c8d35520d97cd501.tar.gz
u-boot-699f05125509249072a0b865c8d35520d97cd501.tar.bz2
Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefilev1.3.4-rc1
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.mvbc_p5
1 files changed, 2 insertions, 3 deletions
diff --git a/doc/README.mvbc_p b/doc/README.mvbc_p
index d32e57f..e3fcb4e 100644
--- a/doc/README.mvbc_p
+++ b/doc/README.mvbc_p
@@ -11,7 +11,7 @@ Matrix Vision mvBlueCOUGAR-P (mvBC-P)
2 System Components
-2.1 CPU
+2.1 CPU
Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
64MB SDRAM @ 133MHz.
8 MByte Nor Flash on local bus.
@@ -20,7 +20,7 @@ Matrix Vision mvBlueCOUGAR-P (mvBC-P)
2.2 PCI
PCI clock fixed at 66MHz. Arbitration inside FPGA.
Intel GD82541ER network MAC/PHY and FPGA connected.
-
+
2.3 FPGA
Altera Cyclone-II EP2C8 with PCI DMA engine.
Connects to Matrix Vision specific CCD/CMOS sensor interface.
@@ -71,4 +71,3 @@ Matrix Vision mvBlueCOUGAR-P (mvBC-P)
2. Initrd - name is stored in "initrd_name"
3. device tree blob - name is stored in "dtb_name"
Fallback files are the flash versions.
-