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authorTom Rini <trini@konsulko.com>2022-03-14 17:40:36 -0400
committerTom Rini <trini@konsulko.com>2022-03-14 17:40:36 -0400
commit2abf048ab7b835787d6627423559832f2b18f253 (patch)
treeafed2c3a11ae600fec9b55ef8c50d5133b65ba87 /doc
parent7b958ede8c795501717b972b67473ea4cdc09b45 (diff)
parentc149bf41404e34014e37de32fac332892b11bd4a (diff)
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Merge tag 'v2022.04-rc4' into next
Prepare v2022.04-rc4
Diffstat (limited to 'doc')
-rw-r--r--doc/board/kontron/sl28.rst66
-rw-r--r--doc/board/sifive/unmatched.rst2
-rw-r--r--doc/build/gcc.rst11
-rw-r--r--doc/kwboot.1105
4 files changed, 142 insertions, 42 deletions
diff --git a/doc/board/kontron/sl28.rst b/doc/board/kontron/sl28.rst
index c7b18be..44435d9 100644
--- a/doc/board/kontron/sl28.rst
+++ b/doc/board/kontron/sl28.rst
@@ -23,34 +23,17 @@ Copy u-boot.rom to a TFTP server.
Install the bootloader on the board
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-Please note, this bootloader doesn't support the builtin watchdog (yet),
-therefore you have to disable it, see below. Otherwise you'll end up in
-the failsafe bootloader on every reset::
+To install the bootloader binary use the following command::
> tftp path/to/u-boot.rom
> sf probe 0
> sf update $fileaddr 0x210000 $filesize
-The board is fully failsafe, you can't break anything. But because you've
-disabled the builtin watchdog you might have to manually enter failsafe
-mode by asserting the ``FORCE_RECOV#`` line during board reset.
-
-Disable the builtin watchdog
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-- boot into the failsafe bootloader, either by asserting the
- ``FORCE_RECOV#`` line or if you still have the original bootloader
- installed you can use the command::
-
- > wdt dev cpld_watchdog@4a; wdt expire 1
-
-- in the failsafe bootloader use the "sl28 nvm" command to disable
- the automatic start of the builtin watchdog::
-
- > sl28 nvm 0008
-
-- power-cycle the board
-
+The board is fully failsafe, you can't break anything. If builtin watchdog
+is enabled, you'll automatically end up in the failsafe bootloader if
+something goes wrong. If the watchdog is disabled, you have to manually
+enter failsafe mode by asserting the ``FORCE_RECOV#`` line during board
+reset.
Update image
------------
@@ -67,20 +50,41 @@ Afterward you can copy this file to your ESP into the /EFI/UpdateCapsule/
folder. On the next EFI boot this will automatically update your
bootloader.
-Useful I2C tricks
------------------
+Builtin watchdog
+----------------
+
+The builtin watchdog will supervise the bootloader startup. If anything
+goes wrong it will reset the board and boot into the failsafe bootloader.
+
+Once the bootloader is started successfully, it will disable the watchdog
+timer.
-The board has a board management controller which is not supported in
-u-boot (yet). But you can use the i2c command to access it.
+wdt command flags
+^^^^^^^^^^^^^^^^^
-- reset into failsafe bootloader::
+The `wdt start` as well as the `wdt expire` command take a flags argument.
+The supported bitmask is as follows.
- > i2c mw 4a 5.1 0; i2c mw 4a 6.1 6b; i2c mw 4a 4.1 42
+| Bit | Description |
+| --- | ----------------------------- |
+| 0 | Enable failsafe mode |
+| 1 | Lock the control register |
+| 2 | Disable board reset |
+| 3 | Enable WDT_TIME_OUT# line |
-- read board management controller version::
+For example, you can use `wdt expire 1` to issue a reset and boot into the
+failsafe bootloader.
+
+Disable the builtin watchdog
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- > i2c md 4a 3.1 1
+If for some reason, this isn't a desired behavior, the watchdog can also
+be configured to not be enabled on board reset. It's configuration is saved
+in the non-volatile board configuration bits. To change these you can use
+the `sl28 nvm` command.
+For more information on the non-volatile board configuration bits, see the
+following section.
Non-volatile Board Configuration Bits
-------------------------------------
diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst
index 24a8899..a994422 100644
--- a/doc/board/sifive/unmatched.rst
+++ b/doc/board/sifive/unmatched.rst
@@ -560,7 +560,7 @@ Write U-boot SPL and U-boot to their partitions.
.. code-block:: none
- dd if=u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync
+ dd if=spl/u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync
dd if=u-boot.itb of=/dev/mtdblock0 bs=4096 seek=261 conv=sync
Power off the board.
diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst
index b883cf7..470a7aa 100644
--- a/doc/build/gcc.rst
+++ b/doc/build/gcc.rst
@@ -25,11 +25,12 @@ Depending on the build targets further packages maybe needed
sudo apt-get install bc bison build-essential coccinelle \
device-tree-compiler dfu-util efitools flex gdisk graphviz imagemagick \
- liblz4-tool libguestfs-tools libncurses-dev libpython3-dev libsdl2-dev \
- libssl-dev lz4 lzma lzma-alone openssl pkg-config python3 \
- python3-coverage python3-pkg-resources python3-pycryptodome \
- python3-pyelftools python3-pytest python3-sphinxcontrib.apidoc \
- python3-sphinx-rtd-theme python3-virtualenv swig
+ liblz4-tool libgnutls28-dev libguestfs-tools libncurses-dev \
+ libpython3-dev libsdl2-dev libssl-dev lz4 lzma lzma-alone openssl \
+ pkg-config python3 python3-coverage python3-pkg-resources \
+ python3-pycryptodome python3-pyelftools python3-pytest \
+ python3-sphinxcontrib.apidoc python3-sphinx-rtd-theme python3-virtualenv \
+ swig
SUSE based
~~~~~~~~~~
diff --git a/doc/kwboot.1 b/doc/kwboot.1
index acdea89..f555ff2 100644
--- a/doc/kwboot.1
+++ b/doc/kwboot.1
@@ -1,4 +1,4 @@
-.TH KWBOOT 1 "2021-08-25"
+.TH KWBOOT 1 "2022-03-02"
.SH NAME
kwboot \- Boot Marvell Kirkwood (and others 32-bit) SoCs over a serial link.
@@ -11,7 +11,7 @@ kwboot \- Boot Marvell Kirkwood (and others 32-bit) SoCs over a serial link.
.SH "DESCRIPTION"
The \fBkwboot\fP program boots boards based on Marvell's 32-bit
-platforms including Kirkwood, Dove, A370, AXP, A375, A38x
+platforms including Kirkwood, Dove, Avanta, A370, AXP, A375, A38x
and A39x over their integrated UART. Boot image files will typically
contain a second stage boot loader, such as U-Boot. The image file
must conform to Marvell's BootROM firmware image format
@@ -48,6 +48,48 @@ example U-Boot SPL does this). In such a case, this output is also
written to stdout after the header is sent.
.TP
+.B "\-b"
+Do only handshake on \fITTY\fP without uploading any file. File upload
+could be done later via option \fB\-D\fP or via any other Xmodem
+application, like \fBsx\fP(1).
+
+.TP
+.B "\-d"
+Do special handshake on \fITTY\fP for console debug mode.
+
+This will instruct BootROM to enter builtin simple console debug mode.
+Should be combined with option \fB\-t\fP.
+
+To get a BootROM help, type this command followed by ENTER key:
+
+.RS 1.2i
+.TP
+.B ?
+.RE
+.IP
+
+Armada 38x BootROM has a bug which cause that BootROM's standard output
+is turned off on UART when SPI-NOR contains valid boot image. Nevertheless
+BootROM's standard input and BootROM's terminal echo are active and working
+fine. To workaround this BootROM bug with standard output, it is possible
+to manually overwrite BootROM variables stored in SRAM which BootROM use
+for checking if standard output is enabled or not. To enable BootROM
+standard output on UART, type this command folled by ENTER key:
+
+.RS 1.2i
+.TP
+.B w 0x40034100 1
+.RE
+
+.TP
+.BI "\-D" " image"
+Upload file \fIimage\fP over \fITTY\fP without initial handshake.
+
+This method is used primary on Dove platforms, where BootROM does
+not support initial handshake for entering UART upload mode and
+strapping pins (exported via e.g. buttons) are used instead.
+
+.TP
.BI "\-p"
Obsolete. Does nothing.
@@ -56,12 +98,32 @@ in the image prior upload, to "UART boot" type. This is now done by
default.
.TP
+.B "\-q"
+Obsolete. Does nothing.
+
+It is unknown whether it did something in the past.
+
+.TP
+.BI "\-s" " response-timeout"
+Specify custom response timeout when doing handshake. Default value is 50 ms.
+It is the timeout between sending two consecutive handshake patterns, meaning
+how long to wait for response from BootROM. Affects only option \fB\-b\fP with
+image file and option \fB\-d\fP.
+
+Option \fB-a\fP specify response timeout suitable for Armada XP BootROM and
+currently it is 1000 ms.
+
+Some testing showed that specifying 24 ms as response timeout make handshake
+with Armada 385 BootROM more stable.
+
+.TP
.BI "\-t"
Run a terminal program, connecting standard input and output to
.RB \fITTY\fP.
-If used in combination with \fB-b\fP, terminal mode is entered
-immediately following a successful image upload.
+If used in combination with \fB\-b\fP, \fB\-D\fP or \fB\-d\fP option,
+terminal mode is entered immediately following a successful image upload
+or successful handshake (if not doing image upload).
If standard I/O streams connect to a console, this mode will terminate
after receiving \fBctrl-\e\fP followed by \fBc\fP from console input.
@@ -85,9 +147,42 @@ Tested values for \fIbaudrate\fP for Armada 38x include: 115200,
230400, 460800, 500000, 576000, 921600, 1000000, 1152000, 1500000,
2000000, 2500000, 3125000, 4000000 and 5200000.
+.SH "EXAMPLES"
+
+Instruct BootROM to enter boot Xmodem boot mode, send \fIu-boot-spl.kwb\fP
+kwbimage file via Xmodem on \fI/dev/ttyUSB0\fP at 115200 Bd and run terminal
+program:
+.IP
+.B kwboot -b u-boot-spl.kwb -t /dev/ttyUSB0
+
+.PP
+Instruct BootROM to enter boot Xmodem boot mode, send header of
+\fIu-boot-spl.kwb\fP kwbimage file via Xmodem at 115200 Bd, then instruct
+BootROM to change baudrate to 5200000 Bd, send data part of the kwbimage
+file via Xmodem at high speed and finally run terminal program:
+.IP
+.B kwboot -b u-boot-spl.kwb -B 5200000 -t /dev/ttyUSB0
+
+.PP
+Only send \fIu-boot-spl.kwb\fP kwbimage file via Xmodem on \fI/dev/ttyUSB0\fP
+at 115200 Bd:
+.IP
+.B kwboot -D u-boot-spl.kwb /dev/ttyUSB0
+
+.PP
+Instruct BootROM to enter console debug mode and run terminal program on
+\fI/dev/ttyUSB0\fP at 115200 Bd:
+.IP
+.B kwboot -d -t /dev/ttyUSB0
+
+.PP
+Only run terminal program on \fI/dev/ttyUSB0\fP at 115200 Bd:
+.IP
+.B kwboot -t /dev/ttyUSB0
+
.SH "SEE ALSO"
.PP
-\fBmkimage\fP(1)
+\fBmkimage\fP(1), \fBsx\fP(1)
.SH "AUTHORS"