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| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2020-05-04 11:24:26 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-07-27 14:16:26 +0530 |
| commit | e7005b3e80d396f45a3ba88448818eee5d592f27 (patch) | |
| tree | 549c06c99dd8522ac8b9099b106b2fc46b96eff5 /doc/device-tree-bindings | |
| parent | ada61f1ee2a4eaa1b29d699b5ba940483171df8a (diff) | |
| download | u-boot-e7005b3e80d396f45a3ba88448818eee5d592f27.zip u-boot-e7005b3e80d396f45a3ba88448818eee5d592f27.tar.gz u-boot-e7005b3e80d396f45a3ba88448818eee5d592f27.tar.bz2 | |
fsl_dspi: Introduce DT bindings for CS-SCK and SCK-CS delays
Communication with some SPI slaves just won't cut it if these delays
(before the beginning, and after the end of a transfer) are not added to
the Chip Select signal.
These are a straight copy from Linux:
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
drivers/spi/spi-fsl-dspi.c
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/spi/spi-mcf-dspi.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt index 860eb8a..4684d78 100644 --- a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt +++ b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt @@ -13,6 +13,10 @@ Optional properties: - ctar-params: CTAR0 to 7 register configuration, as an array of 8 integer fields for each register, where each register is defined as: <fmsz, pcssck, pasc, pdt, cssck, asc, dt, br>. +- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip + select and the start of clock signal, at the start of a transfer. +- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock + signal and deactivating chip select, at the end of a transfer. Example: |