From e7005b3e80d396f45a3ba88448818eee5d592f27 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean Date: Mon, 4 May 2020 11:24:26 +0300 Subject: fsl_dspi: Introduce DT bindings for CS-SCK and SCK-CS delays Communication with some SPI slaves just won't cut it if these delays (before the beginning, and after the end of a transfer) are not added to the Chip Select signal. These are a straight copy from Linux: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt drivers/spi/spi-fsl-dspi.c Signed-off-by: Vladimir Oltean [Rebased] Signed-off-by: Priyanka Jain --- doc/device-tree-bindings/spi/spi-mcf-dspi.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'doc/device-tree-bindings') diff --git a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt index 860eb8a..4684d78 100644 --- a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt +++ b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt @@ -13,6 +13,10 @@ Optional properties: - ctar-params: CTAR0 to 7 register configuration, as an array of 8 integer fields for each register, where each register is defined as: . +- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip + select and the start of clock signal, at the start of a transfer. +- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock + signal and deactivating chip select, at the end of a transfer. Example: -- cgit v1.1