aboutsummaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorWolfgang Denk <wd@pollux.denx.de>2007-01-15 13:41:04 +0100
committerWolfgang Denk <wd@denx.de>2007-01-15 13:41:04 +0100
commitf11033e739017c5c4eac55f859b8b222ee8d602c (patch)
tree4b07b98f378e685c096937c2aeca06e006698af7 /cpu
parentddd4123336aad881f50dc34892ac150cfa8143fe (diff)
parentca43ba18e910206ef8063e4b22d282630bff3fd2 (diff)
downloadu-boot-f11033e739017c5c4eac55f859b8b222ee8d602c.zip
u-boot-f11033e739017c5c4eac55f859b8b222ee8d602c.tar.gz
u-boot-f11033e739017c5c4eac55f859b8b222ee8d602c.tar.bz2
Merge with /home/hs/SC3/u-boot
Some code cleanup.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc8xx/serial.c6
-rw-r--r--cpu/ppc4xx/405gp_pci.c4
-rw-r--r--cpu/ppc4xx/cpu_init.c11
3 files changed, 15 insertions, 6 deletions
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c
index c8caa79..9d0fc6b 100644
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -229,15 +229,15 @@ static int smc_init (void)
#ifdef CFG_SPC1920_SMC1_CLK4
/* clock source is PLD */
-
+
/* set freq to 19200 Baud */
*((volatile uchar *) CFG_SPC1920_PLD_BASE+6) = 0x3;
/* configure clk4 as input */
im->im_ioport.iop_pdpar |= 0x800;
im->im_ioport.iop_pddir &= ~0x800;
-
+
cp->cp_simode = 0x0000;
- cp->cp_simode |= 0x7000;
+ cp->cp_simode |= 0x7000;
#else
/* Set up the baud rate generator */
smc_setbrg ();
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 9b711e2..38a1305 100644
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -380,7 +380,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
}
-#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405))
+#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) || defined (CONFIG_SOLIDCARD3)
/*
*As is these functs get called out of flash Not a horrible
@@ -406,6 +406,7 @@ static struct pci_controller hose = {
config_table: pci_405gp_config_table,
};
+#ifndef CONFIG_SOLIDCARD3
void pci_init_board(void)
{
/*we want the ptrs to RAM not flash (ie don't use init list)*/
@@ -413,6 +414,7 @@ void pci_init_board(void)
hose.config_table = pci_405gp_config_table;
pci_405gp_init(&hose);
}
+#endif
#endif
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index db0559b..e2aa867 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -219,6 +219,10 @@ void set_chip_gpio_configuration(gpio_param_s (*gpio_tab)[GPIO_GROUP_MAX][GPIO_M
void
cpu_init_f (void)
{
+#if defined(CONFIG_WATCHDOG)
+ unsigned long val;
+#endif
+
#if defined(CONFIG_405EP)
/*
* GPIO0 setup (select GPIO or alternate function)
@@ -309,9 +313,12 @@ cpu_init_f (void)
mtebc(pb7cr, CFG_EBC_PB7CR);
#endif
-#if defined(CONFIG_WATCHDOG)
- unsigned long val;
+#if defined (CONFIG_SOLIDCARD3)
+ mtebc(epcr, 0xb84ef000);
+ *(unsigned long *)0x79000080 = 0x0001;
+#endif
+#if defined(CONFIG_WATCHDOG)
val = mfspr(tcr);
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
val |= 0xb8000000; /* generate system reset after 1.34 seconds */