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author | Marian Balakowicz <m8@semihalf.com> | 2006-03-14 16:02:31 +0100 |
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committer | Marian Balakowicz <m8@semihalf.com> | 2006-03-14 16:02:31 +0100 |
commit | cd94ba397ed9c7d06578977d6c34c24732b2a9f1 (patch) | |
tree | 232b73e5829779148efcda36a3dadeac148ba2bd /cpu | |
parent | a7c66ad2e52b49a7cf5efb9665dd0527db96ea29 (diff) | |
download | u-boot-cd94ba397ed9c7d06578977d6c34c24732b2a9f1.zip u-boot-cd94ba397ed9c7d06578977d6c34c24732b2a9f1.tar.gz u-boot-cd94ba397ed9c7d06578977d6c34c24732b2a9f1.tar.bz2 |
Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/mpc83xx/start.S | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index 324f6c3..6e02cce 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -836,6 +836,40 @@ get_pvr: mfspr r3, PVR blr +/*------------------------------------------------------------------------------- */ +/* Function: ppcDcbf */ +/* Description: Data Cache block flush */ +/* Input: r3 = effective address */ +/* Output: none. */ +/*------------------------------------------------------------------------------- */ + .globl ppcDcbf +ppcDcbf: + dcbf r0,r3 + blr + +/*------------------------------------------------------------------------------- */ +/* Function: ppcDcbi */ +/* Description: Data Cache block Invalidate */ +/* Input: r3 = effective address */ +/* Output: none. */ +/*------------------------------------------------------------------------------- */ + .globl ppcDcbi +ppcDcbi: + dcbi r0,r3 + blr + +/*-------------------------------------------------------------------------- + * Function: ppcDcbz + * Description: Data Cache block zero. + * Input: r3 = effective address + * Output: none. + *-------------------------------------------------------------------------- */ + + .globl ppcDcbz +ppcDcbz: + dcbz r0,r3 + blr + /*-------------------------------------------------------------------*/ /* |