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| author | Thierry Reding <treding@nvidia.com> | 2019-04-15 11:32:27 +0200 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2019-06-05 09:16:34 -0700 |
| commit | 8e90c8d64bfe3c7b89a6bf1bf42d902c0633881a (patch) | |
| tree | 0830ca6a90186849a3be03b0848f97fe7fe79026 /configs/p2771-0000-000_defconfig | |
| parent | 836a56e729a082639d26499c8eb2d409308542a4 (diff) | |
| download | u-boot-8e90c8d64bfe3c7b89a6bf1bf42d902c0633881a.zip u-boot-8e90c8d64bfe3c7b89a6bf1bf42d902c0633881a.tar.gz u-boot-8e90c8d64bfe3c7b89a6bf1bf42d902c0633881a.tar.bz2 | |
ARM: tegra: Restore DRAM bank count
Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced
the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000
boards.
However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000:
increase max DRAM bank count"), the platform can have a large number of
unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks
are needed to describe the worst-case situation.
In practice the number of DRAM banks needed will typically be much
lower, but we should be prepared to properly deal with the worst case.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'configs/p2771-0000-000_defconfig')
| -rw-r--r-- | configs/p2771-0000-000_defconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 6d66cae..f77ff9f 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 -CONFIG_NR_DRAM_BANKS=8 +CONFIG_NR_DRAM_BANKS=1026 CONFIG_TEGRA186=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y |