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author | Wolfgang Denk <wd@denx.de> | 2011-10-04 22:08:13 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-10-04 22:08:13 +0200 |
commit | 1fed668b3fb9c35932f58af00ff5539239fa4e1d (patch) | |
tree | eaaaead8ca19924af1823caae040f504be9b6d98 /common | |
parent | c52575350fd6e794717f6bee4f81dbb8038fe22e (diff) | |
parent | 6d7b061af153bc5beb633c3bd15348284716a067 (diff) | |
download | u-boot-1fed668b3fb9c35932f58af00ff5539239fa4e1d.zip u-boot-1fed668b3fb9c35932f58af00ff5539239fa4e1d.tar.gz u-boot-1fed668b3fb9c35932f58af00ff5539239fa4e1d.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/p3060: Add SoC related support for P3060 platform
powerpc/85xx: Add support for setting up RAID engine liodns on P5020
powerpc/85xx: Refactor some defines out of corenet_ds.h
fm-eth: Add ability for board code to disable a port
powerpc/mpc8548: Add workaround for erratum NMG_LBC103
powerpc/mpc8548: Add workaround for erratum NMG_DDR120
powerpc/mpc85xxcds: Fix PCI speed
powerpc/mpc8548cds: Fix booting message
powerpc/p4080: Add support for secure boot flow
powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
powerpc/p2041rdb: remove watch dog related codes
powerpc/p2041rdb: updated description of cpld command
powerpc/p2041rdb: add more ddr frequencies support
powerpc/p2041rdb: set sysclk according to status of physical switch SW1
powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
powerpc/mpc8xxx: Add DDR2 to unified DDR driver
powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
powerpc/85xx: Refactor P2041RDB to use common p_corenet files
powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
powerpc/85xx: Enable CMD_REGINFO on corenet boards
powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
powerpc/85xx: Fix USB protocol definitions for P1020RDB
powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
powerpc/mpc8xxx: Move DDR RCW overriding to common code
powerpc/mpc8xxx: Extend CWL table
powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
powerpc/85xx: Cleanup extern in corenet_ds board code
powerpc/p2041rdb: Add ethernet support on P2041RDB board
powerpc/85xx: Add networking support to P1023RDS
powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
powerpc/85xx: Add FMan ethernet support to P4080DS
powerpc/85xx: Add support for FMan ethernet in Independent mode
powerpc/mpc8548cds: Cleanup mpc8548cds.c
powerpc/mp: add support for discontiguous cores
powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
fdt: Add new fdt_create_phandle helper
fdt: Rename fdt_create_phandle to fdt_set_phandle
powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
nand: Freescale Integrated Flash Controller NAND support
powerpc/85xx: Add basic support for P1010RDB
powerpc/85xx: Add support for new P102x/P2020 RDB style boards
powerpc/85xx: relocate CCSR before creating the initial RAM area
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
Diffstat (limited to 'common')
-rw-r--r-- | common/Makefile | 8 | ||||
-rw-r--r-- | common/cmd_mp.c | 5 | ||||
-rw-r--r-- | common/fdt_support.c | 26 |
3 files changed, 32 insertions, 7 deletions
diff --git a/common/Makefile b/common/Makefile index 2edbd71..371a0d9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -162,7 +162,13 @@ COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o # others -COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o +ifdef CONFIG_DDR_SPD +SPD := y +endif +ifdef CONFIG_SPD_EEPROM +SPD := y +endif +COBJS-$(SPD) += ddr_spd.o COBJS-$(CONFIG_HWCONFIG) += hwconfig.o COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o COBJS-y += flash.o diff --git a/common/cmd_mp.c b/common/cmd_mp.c index f19bf41..b115b59 100644 --- a/common/cmd_mp.c +++ b/common/cmd_mp.c @@ -32,9 +32,8 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return cmd_usage(cmdtp); cpuid = simple_strtoul(argv[1], NULL, 10); - if (cpuid >= cpu_numcores()) { - printf ("Core num: %lu is out of range[0..%d]\n", - cpuid, cpu_numcores() - 1); + if (!is_core_valid(cpuid)) { + printf ("Core num: %lu is not valid\n", cpuid); return 1; } diff --git a/common/fdt_support.c b/common/fdt_support.c index 19b2ef6..46aa842 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -1196,13 +1196,13 @@ int fdt_alloc_phandle(void *blob) } /* - * fdt_create_phandle: Create a phandle property for the given node + * fdt_set_phandle: Create a phandle property for the given node * * @fdt: ptr to device tree * @nodeoffset: node to update * @phandle: phandle value to set (must be unique) -*/ -int fdt_create_phandle(void *fdt, int nodeoffset, uint32_t phandle) + */ +int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) { int ret; @@ -1235,6 +1235,26 @@ int fdt_create_phandle(void *fdt, int nodeoffset, uint32_t phandle) return ret; } +/* + * fdt_create_phandle: Create a phandle property for the given node + * + * @fdt: ptr to device tree + * @nodeoffset: node to update + */ +int fdt_create_phandle(void *fdt, int nodeoffset) +{ + /* see if there is a phandle already */ + int phandle = fdt_get_phandle(fdt, nodeoffset); + + /* if we got 0, means no phandle so create one */ + if (phandle == 0) { + phandle = fdt_alloc_phandle(fdt); + fdt_set_phandle(fdt, nodeoffset, phandle); + } + + return phandle; +} + #if defined(CONFIG_VIDEO) int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) { |