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author | Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> | 2017-03-23 13:48:18 +0530 |
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committer | York Sun <york.sun@nxp.com> | 2017-04-17 09:03:30 -0700 |
commit | f7244f2c4815aa80a7cd7e9ceaee1969a16acd47 (patch) | |
tree | e1b30bb7445369de125e008038eca9943fe6330b /board | |
parent | b7c19ea1ca7d3a02b8aa1e0f756ca60951fa367e (diff) | |
download | u-boot-f7244f2c4815aa80a7cd7e9ceaee1969a16acd47.zip u-boot-f7244f2c4815aa80a7cd7e9ceaee1969a16acd47.tar.gz u-boot-f7244f2c4815aa80a7cd7e9ceaee1969a16acd47.tar.bz2 |
armv8: LS1046ARDB: Add QSPI Secure Boot target
Add QSPI Secure Boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/ls1046ardb/Kconfig | 2 | ||||
-rw-r--r-- | board/freescale/ls1046ardb/MAINTAINERS | 4 | ||||
-rw-r--r-- | board/freescale/ls1046ardb/ls1046ardb.c | 19 |
3 files changed, 24 insertions, 1 deletions
diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig index a62255c..b9f2ed7 100644 --- a/board/freescale/ls1046ardb/Kconfig +++ b/board/freescale/ls1046ardb/Kconfig @@ -12,5 +12,5 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046ardb" - +source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index ff42bef..758ff9d 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -7,3 +7,7 @@ F: include/configs/ls1046ardb.h F: configs/ls1046ardb_qspi_defconfig F: configs/ls1046ardb_sdcard_defconfig F: configs/ls1046ardb_emmc_defconfig + +M: Sumit Garg <sumit.garg@nxp.com> +S: Maintained +F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 0cc508b..1dd5e69 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -21,6 +21,7 @@ #include <fsl_esdhc.h> #include <power/mc34vr500_pmic.h> #include "cpld.h" +#include <fsl_sec.h> DECLARE_GLOBAL_DATA_PTR; @@ -72,6 +73,24 @@ int board_init(void) enable_layerscape_ns_access(); #endif +#ifdef CONFIG_SECURE_BOOT + /* + * In case of Secure Boot, the IBR configures the SMMU + * to allow only Secure transactions. + * SMMU must be reset in bypass mode. + * Set the ClientPD bit and Clear the USFCFG Bit + */ + u32 val; + val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_SCR0, val); + val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); + out_le32(SMMU_NSCR0, val); +#endif + +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif |