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authorBalamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>2022-10-25 16:21:09 +0530
committerEugen Hristev <eugen.hristev@microchip.com>2022-12-08 18:06:27 +0200
commitc41e05bab0b025691741d819ff372c08e285b99a (patch)
treee809a333e519ea75a5f26afdf14cebfd8e898084 /board
parent70cbf2f09784319d2773a09e26bba077f6af927b (diff)
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board: sam9x60ek: remove nand init from board file
Move this out of board file as this is done by the DM based NAND flash driver. The EBI chip select configuration, iomux and timings are handled by the driver Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Diffstat (limited to 'board')
-rw-r--r--board/atmel/sam9x60ek/sam9x60ek.c59
1 files changed, 0 insertions, 59 deletions
diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c
index a3e35f3..04bf2bb 100644
--- a/board/atmel/sam9x60ek/sam9x60ek.c
+++ b/board/atmel/sam9x60ek/sam9x60ek.c
@@ -24,62 +24,6 @@ DECLARE_GLOBAL_DATA_PTR;
void at91_prepare_cpu_var(void);
-#ifdef CONFIG_CMD_NAND
-static void sam9x60ek_nand_hw_init(void)
-{
- struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
- struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
- unsigned int csa;
-
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 2, 0); /* NAND ALE */
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 3, 0); /* NAND CLE */
- /* Enable NandFlash */
- at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
- /* Configure RDY/BSY */
- at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 6, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 7, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 8, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 9, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 10, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 11, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 12, 1);
- at91_pio3_set_a_periph(AT91_PIO_PORTD, 13, 1);
-
- at91_periph_clk_enable(ATMEL_ID_PIOD);
-
- /* Enable CS3 */
- csa = readl(&sfr->ebicsa);
- csa |= AT91_SFR_CCFG_EBI_CSA(3, 1) | AT91_SFR_CCFG_NFD0_ON_D16;
-
- /* Configure IO drive */
- csa &= ~AT91_SFR_CCFG_EBI_DRIVE_SAM9X60;
-
- writel(csa, &sfr->ebicsa);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- writel(AT91_SMC_SETUP_NWE(4), &smc->cs[3].setup);
-
- writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(20) |
- AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(20),
- &smc->cs[3].pulse);
-
- writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20),
- &smc->cs[3].cycle);
-
- writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_MODE_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_MODE_DBW_8 |
-#endif
- AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(15),
- &smc->cs[3].mode);
-}
-#endif
-
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
@@ -122,9 +66,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
-#ifdef CONFIG_CMD_NAND
- sam9x60ek_nand_hw_init();
-#endif
return 0;
}