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| author | Vishal Mahaveer <vishalm@ti.com> | 2017-08-26 16:51:22 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-09-12 18:02:29 -0400 |
| commit | ba39608147c797cffb266579b5791649f0f8e60c (patch) | |
| tree | 98f628e3b71108537dc2a91649073fd8c1c16978 /board | |
| parent | f9268375044a27ebd8205f9a761541ce671bc656 (diff) | |
| download | u-boot-ba39608147c797cffb266579b5791649f0f8e60c.zip u-boot-ba39608147c797cffb266579b5791649f0f8e60c.tar.gz u-boot-ba39608147c797cffb266579b5791649f0f8e60c.tar.bz2 | |
ARM: DRA72x: Add support for detection of DRA71x SR 2.1
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Add support for detection
of SR2.1 version of DRA71x family of processors.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/ti/dra7xx/evm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index bd871fa..97aae01 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -293,6 +293,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) break; case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: if (ram_size < CONFIG_MAX_MEM_MAPPED) *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1; else @@ -357,6 +358,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) break; case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: default: if (ram_size < CONFIG_MAX_MEM_MAPPED) *dmm_lisa_regs = &lisa_map_2G_x_2; @@ -755,6 +757,7 @@ void recalibrate_iodelay(void) switch (omap_revision()) { case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: pads = dra72x_core_padconf_array_common; npads = ARRAY_SIZE(dra72x_core_padconf_array_common); if (board_is_dra71x_evm()) { |