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authorMarek Vasut <marek.vasut+renesas@gmail.com>2020-03-21 16:57:58 +0100
committermarex <marex@desktop.lan>2020-03-30 11:35:23 +0200
commit4666521d19df4421be1b3c1042ac7ecfb351f884 (patch)
tree83bbf10ac19dedabe9e12885a63f0c2fb6733be5 /board
parent9cf09c799a389c07d26104bb6ca2079dcc835f37 (diff)
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ARM: rmobile: Implement PMIC reset on V2H Blanche
Add code to reset the board through PMIC, by writing the required PMIC registers in the CPU reset handler. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board')
-rw-r--r--board/renesas/blanche/blanche.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 7232370..471d80f 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -20,6 +20,7 @@
#include <dm.h>
#include <dm/platform_data/serial_sh.h>
#include <env.h>
+#include <hang.h>
#include <i2c.h>
#include <linux/errno.h>
#include <malloc.h>
@@ -355,4 +356,23 @@ int dram_init_banksize(void)
void reset_cpu(ulong addr)
{
+ struct udevice *dev;
+ const u8 pmic_bus = 6;
+ const u8 pmic_addr = 0x58;
+ u8 data;
+ int ret;
+
+ ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
+ if (ret)
+ hang();
+
+ ret = dm_i2c_read(dev, 0x13, &data, 1);
+ if (ret)
+ hang();
+
+ data |= BIT(1);
+
+ ret = dm_i2c_write(dev, 0x13, &data, 1);
+ if (ret)
+ hang();
}