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| author | Bin Meng <bmeng.cn@gmail.com> | 2019-05-22 00:09:46 -0700 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-06-01 13:33:17 -0500 |
| commit | 3ef64444de157a2e4f6a61b3ea617b9d201a6836 (patch) | |
| tree | c4754e75f073584577c59bc4ee56bb922cbc8ba9 /board | |
| parent | a5e3d2350b271d6281c01ae7ad0dd7290ba66aee (diff) | |
| download | u-boot-3ef64444de157a2e4f6a61b3ea617b9d201a6836.zip u-boot-3ef64444de157a2e4f6a61b3ea617b9d201a6836.tar.gz u-boot-3ef64444de157a2e4f6a61b3ea617b9d201a6836.tar.bz2 | |
dm: net: macb: Implement link speed change callback
At present the link speed change callback is a nop. According to
macb device tree bindings, an optional "tx_clk" is used to clock
the ethernet controller's TX_CLK under different link speed.
In 10/100 MII mode, transmit logic must be clocked from a free
running clock generated by the external PHY. In gigabit GMII mode,
the controller, not the external PHY, must generate the 125 MHz
transmit clock towards the PHY.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'board')
0 files changed, 0 insertions, 0 deletions