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| author | Chris Packham <judge.packham@gmail.com> | 2020-01-30 12:50:44 +1300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2020-04-14 08:59:44 +0200 |
| commit | 236609d93c76b9e108d765cd7cf0632063ea8273 (patch) | |
| tree | af7271c3b37a41b1731e2c56f06178e6f5d6043d /board | |
| parent | 891483186052b259852f3f48926ff307763f4eb0 (diff) | |
| download | u-boot-236609d93c76b9e108d765cd7cf0632063ea8273.zip u-boot-236609d93c76b9e108d765cd7cf0632063ea8273.tar.gz u-boot-236609d93c76b9e108d765cd7cf0632063ea8273.tar.bz2 | |
ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter
For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/alliedtelesis/x530/x530.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index e0fa806..04b053d 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -66,7 +66,11 @@ static struct mv_ddr_topology_map board_topology_map = { BUS_MASK_32BIT_ECC, /* subphys mask */ MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ { {0} }, /* raw spd data */ - {0} /* timing parameters */ + {0}, /* timing parameters */ + { {0} }, /* electrical configuration */ + {0}, /* electrical parameters */ + 0, /* Clock enable mask */ + 160 /* Clock delay */ }; struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) |