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| author | Suman Anna <s-anna@ti.com> | 2021-07-26 18:22:48 -0500 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-07-29 10:42:22 +0530 |
| commit | a6c64d255e5117bcf78aec6911d7c034fbfe46f7 (patch) | |
| tree | 58d4a2507acd56d62aa681f29a07fca858418c6c /board/ti | |
| parent | bcad620f683168d09f688ca7bf42980981496aa0 (diff) | |
| download | u-boot-a6c64d255e5117bcf78aec6911d7c034fbfe46f7.zip u-boot-a6c64d255e5117bcf78aec6911d7c034fbfe46f7.tar.gz u-boot-a6c64d255e5117bcf78aec6911d7c034fbfe46f7.tar.bz2 | |
board: ti: k2g: Program PadConfig_202 before locking RSTMUX8
The PADCONFIG_202 register (0x02621328) is affected by the locking
of the RSTMUX8 register (0x02620328), and so cannot be configured
in kernel. This has been confirmed as a hardware bug and affects
all K2G SoCs.
Setup the pinmux for this pin before locking the RSTMUX8 register
to allow the ICSS1 PRU1 Ethernet PHY port to work properly. The
workaround was added only for the K2G-ICE board to configure the
pins needed for the PRUSS Ethernet usecase.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210726232248.24395-1-s-anna@ti.com
Diffstat (limited to 'board/ti')
| -rw-r--r-- | board/ti/ks2_evm/mux-k2g.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h index fa6c92c..f24e628 100644 --- a/board/ti/ks2_evm/mux-k2g.h +++ b/board/ti/ks2_evm/mux-k2g.h @@ -368,6 +368,9 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = { { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */ + /* ICSS1 Padconf Workaround */ + { 202, MODE(1) | PIN_PDIS }, /* PR1_PRU1_GPO1.PR1_PRU1_GPI1 (PR1_MII1_RXD1) */ + { MAX_PIN_N, } }; |