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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-05-19 23:25:16 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-21 22:15:32 +0200 |
| commit | 6ef540d50f3beb0ff94d3fbdae3548b3b8dd05cd (patch) | |
| tree | 1a1932aa57a9cc530e324c554bcd21a005bb4e83 /board/renesas/draak | |
| parent | 5602330df0306a44d78c1ba67ab7e15aa6f3fc41 (diff) | |
| download | u-boot-6ef540d50f3beb0ff94d3fbdae3548b3b8dd05cd.zip u-boot-6ef540d50f3beb0ff94d3fbdae3548b3b8dd05cd.tar.gz u-boot-6ef540d50f3beb0ff94d3fbdae3548b3b8dd05cd.tar.bz2 | |
ARM: renesas: Factor out DRAM setup on R-Car Gen3
Pull DRAM layout configuration code into rcar-common.c instead of
having it in multiple copies across board files. This poses no
change for Salvator-X/XS, ULCB and Ebisu boards, however it adds
a bit of extra code for Draak and Eagle boards, which now gain
the capability of being passed in the DRAM layout by the ATF.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/renesas/draak')
| -rw-r--r-- | board/renesas/draak/Makefile | 2 | ||||
| -rw-r--r-- | board/renesas/draak/draak.c | 15 |
2 files changed, 1 insertions, 16 deletions
diff --git a/board/renesas/draak/Makefile b/board/renesas/draak/Makefile index 0140b61..1fc90d1 100644 --- a/board/renesas/draak/Makefile +++ b/board/renesas/draak/Makefile @@ -9,5 +9,5 @@ ifdef CONFIG_SPL_BUILD obj-y := ../rcar-common/gen3-spl.o else -obj-y := draak.o +obj-y := draak.o ../rcar-common/common.o endif diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 8f3d391..46d9f74 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -70,21 +70,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - if (fdtdec_setup_mem_size_base() != 0) - return -EINVAL; - - return 0; -} - -int dram_init_banksize(void) -{ - fdtdec_setup_memory_banksize(); - - return 0; -} - #define RST_BASE 0xE6160000 #define RST_CA57RESCNT (RST_BASE + 0x40) #define RST_CA53RESCNT (RST_BASE + 0x44) |