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author | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-02-06 23:06:43 +0100 |
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committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-02-17 22:52:41 +0100 |
commit | 186678600a3aa81f883e4bf4b94ca4d40081d93a (patch) | |
tree | bc7dc63481548507c03aeaf207accec81aefbece /board/mimc | |
parent | e9ed41cc5c684b4b08988934544449eb782c14db (diff) | |
download | u-boot-186678600a3aa81f883e4bf4b94ca4d40081d93a.zip u-boot-186678600a3aa81f883e4bf4b94ca4d40081d93a.tar.gz u-boot-186678600a3aa81f883e4bf4b94ca4d40081d93a.tar.bz2 |
avr32: convert to dram_init()
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/mimc')
-rw-r--r-- | board/mimc/mimc200/mimc200.c | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 186ac7d..f078295 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -91,6 +91,8 @@ int board_early_init_f(void) /* Enable 26 address bits and NCS2 */ portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); + sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config); + portmux_enable_usart1(PORTMUX_DRIVE_MIN); /* de-assert "force sys reset" pin */ @@ -151,24 +153,6 @@ int board_early_init_f(void) return 0; } -phys_size_t initdram(int board_type) -{ - unsigned long expected_size; - unsigned long actual_size; - void *sdram_base; - - sdram_base = uncached(EBI_SDRAM_BASE); - - expected_size = sdram_init(sdram_base, &sdram_config); - actual_size = get_ram_size(sdram_base, expected_size); - - if (expected_size != actual_size) - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - - return actual_size; -} - int board_early_init_r(void) { gd->bd->bi_phy_id[0] = 0x01; |