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authorwdenk <wdenk>2001-04-28 17:59:11 +0000
committerwdenk <wdenk>2001-04-28 17:59:11 +0000
commit4a5b6a356a79123d3fcd780139629213afcedca8 (patch)
treea54c1cec31c73462ba2c04fac3318a0990dd21b1 /board/mbx8xx
parentb631bb9cad6b5553846f508fbfa5ba6362fb0677 (diff)
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Initial revision
Diffstat (limited to 'board/mbx8xx')
-rw-r--r--board/mbx8xx/Makefile40
-rw-r--r--board/mbx8xx/csr.h60
-rw-r--r--board/mbx8xx/dimm.h98
-rw-r--r--board/mbx8xx/u-boot.lds122
-rw-r--r--board/mbx8xx/vpd.h119
5 files changed, 439 insertions, 0 deletions
diff --git a/board/mbx8xx/Makefile b/board/mbx8xx/Makefile
new file mode 100644
index 0000000..f8fb581
--- /dev/null
+++ b/board/mbx8xx/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS = $(BOARD).o flash.o vpd.o
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $^
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/mbx8xx/csr.h b/board/mbx8xx/csr.h
new file mode 100644
index 0000000..832e924
--- /dev/null
+++ b/board/mbx8xx/csr.h
@@ -0,0 +1,60 @@
+#ifndef __csr_h
+#define __csr_h
+
+/*
+ * (C) Copyright 2000
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Control and Status Register definitions for the MBX
+ *
+ *--------------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* bits for control register #1 / status register #1 */
+#define CSR1_ETEN 0x80 /* Ethernet Transceiver Enabled */
+#define CSR1_ELEN 0x40 /* Ethernet XCVR in Internal Loopback */
+#define CSR1_EAEN 0x20 /* Auto selection TP/AUI Enabled */
+#define CSR1_TPEN 0x10 /* TP manually selected */
+#define CSR1_FDDIS 0x08 /* Full Duplex Mode disabled */
+#define CSR1_FCTEN 0x04 /* Collision Testing of XCVR disabled */
+#define CSR1_COM1EN 0x02 /* COM1 signals routed to RS232 Transceiver */
+#define CSR1_XCVRDIS 0x01 /* Onboard RS232 Transceiver Disabled */
+
+/* bits for control register #2 */
+#define CR2_VDDSEL 0xC0 /* PCMCIA Supply Voltage */
+#define CR2_VPPSEL 0x30 /* PCMCIA Programming Voltage */
+#define CR2_BRDFAIL 0x08 /* Board fail */
+#define CR2_SWS1 0x04 /* Software Status #2 LED */
+#define CR2_SWS2 0x02 /* Software Status #2 LED */
+#define CR2_QSPANRST 0x01 /* Reset QSPAN */
+
+/* bits for status register #2 */
+#define SR2_VDDSEL 0xC0 /* PCMCIA Supply Voltage */
+#define SR2_VPPSEL 0x30 /* PCMCIA Programming Voltage */
+#define SR2_BATGD 0x08 /* Low Voltage indication for onboard bat */
+#define SR2_NVBATGD 0x04 /* Low Voltage indication for NVRAM */
+#define SR2_RDY 0x02 /* Flash programming status bit */
+#define SR2_FT 0x01 /* Reserved for Factory test purposes */
+
+#define MBX_CSR1 (*((uchar *)CFG_CSR_BASE))
+#define MBX_CSR2 (*((uchar *)CFG_CSR_BASE + 1))
+
+#endif /* __csr_h */
diff --git a/board/mbx8xx/dimm.h b/board/mbx8xx/dimm.h
new file mode 100644
index 0000000..b40f112
--- /dev/null
+++ b/board/mbx8xx/dimm.h
@@ -0,0 +1,98 @@
+#ifndef __dimm_h
+#define __dimm_h
+
+/*
+ * Module name: %M%
+ * Description:
+ * Serial Presence Detect Definitions Module
+ * SCCS identification: %I%
+ * Branch: %B%
+ * Sequence: %S%
+ * Date newest applied delta was created (MM/DD/YY): %G%
+ * Time newest applied delta was created (HH:MM:SS): %U%
+ * SCCS file name %F%
+ * Fully qualified SCCS file name:
+ * %P%
+ * Copyright:
+ * (C) COPYRIGHT MOTOROLA, INC. 1996
+ * ALL RIGHTS RESERVED
+ * Notes:
+ * 1. All data was taken from an IBM application note titled
+ * "Serial Presence Detect Definitions".
+ * History:
+ * Date Who
+ *
+ * 10/24/96 Rob Baxter
+ * Initial release.
+ *
+ */
+
+/*
+ * serial PD byte assignment address map (256 byte EEPROM)
+ */
+typedef struct dimm
+{
+ uchar n_bytes; /* 00 number of bytes written/used */
+ uchar t_bytes; /* 01 total number of bytes in serial PD device */
+ uchar fmt; /* 02 fundamental memory type (FPM/EDO/SDRAM) */
+ uchar n_row; /* 03 number of rows */
+ uchar n_col; /* 04 number of columns */
+ uchar n_banks; /* 05 number of banks */
+ uchar data_w_lo; /* 06 data width */
+ uchar data_w_hi; /* 07 data width */
+ uchar ifl; /* 08 interface levels */
+ uchar a_ras; /* 09 RAS access */
+ uchar a_cas; /* 0A CAS access */
+ uchar ct; /* 0B configuration type (non-parity/parity/ECC) */
+ uchar refresh_rt; /* 0C refresh rate/type */
+ uchar p_dram_o; /* 0D primary DRAM organization */
+ uchar s_dram_o; /* 0E secondary DRAM organization (parity/ECC-checkbits) */
+ uchar reserved[17]; /* 0F reserved fields for future offerings */
+ uchar ss_info[32]; /* 20 superset information (may be used in the future) */
+ uchar m_info[64]; /* 40 manufacturer information (optional) */
+ uchar unused[128]; /* 80 unused storage locations */
+} dimm_t;
+
+/*
+ * memory type definitions
+ */
+#define DIMM_MT_FPM 1 /* standard FPM (fast page mode) DRAM */
+#define DIMM_MT_EDO 2 /* EDO (extended data out) */
+#define DIMM_MT_PN 3 /* pipelined nibble */
+#define DIMM_MT_SDRAM 4 /* SDRAM (synchronous DRAM) */
+
+/*
+ * row addresses definitions
+ */
+#define DIMM_RA_RDNDNT (1<<7) /* redundant addressing */
+#define DIMM_RA_MASK 0x7f /* number of row addresses mask */
+
+/*
+ * module interface levels definitions
+ */
+#define DIMM_IFL_TTL 0 /* TTL/5V tolerant */
+#define DIMM_IFL_LVTTL 1 /* LVTTL (not 5V tolerant) */
+#define DIMM_IFL_HSTL15 2 /* HSTL 1.5 */
+#define DIMM_IFL_SSTL33 3 /* SSTL 3.3 */
+#define DIMM_IFL_SSTL25 4 /* SSTL 2.5 */
+
+/*
+ * DIMM configuration type definitions
+ */
+#define DIMM_CT_NONE 0 /* none */
+#define DIMM_CT_PARITY 1 /* parity */
+#define DIMM_CT_ECC 2 /* ECC */
+
+/*
+ * row addresses definitions
+ */
+#define DIMM_RRT_SR (1<<7) /* self refresh flag */
+#define DIMM_RRT_MASK 0x7f /* refresh rate mask */
+#define DIMM_RRT_NRML 0x00 /* normal (15.625us) */
+#define DIMM_RRT_R_3_9 0x01 /* reduced .25x (3.9us) */
+#define DIMM_RRT_R_7_8 0x02 /* reduced .5x (7.8us) */
+#define DIMM_RRT_E_31_3 0x03 /* extended 2x (31.3us) */
+#define DIMM_RRT_E_62_5 0x04 /* extended 4x (62.5us) */
+#define DIMM_RRT_E_125 0x05 /* extended 8x (125us) */
+
+#endif /* __dimm_h */
diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds
new file mode 100644
index 0000000..d647be3
--- /dev/null
+++ b/board/mbx8xx/u-boot.lds
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc8xx/start.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
+
diff --git a/board/mbx8xx/vpd.h b/board/mbx8xx/vpd.h
new file mode 100644
index 0000000..1d9eb7f
--- /dev/null
+++ b/board/mbx8xx/vpd.h
@@ -0,0 +1,119 @@
+#ifndef __vpd_h
+#define __vpd_h
+
+/*
+ * Module name: %M%
+ * Description:
+ * Vital Product Data (VPD) Header Module
+ * SCCS identification: %I%
+ * Branch: %B%
+ * Sequence: %S%
+ * Date newest applied delta was created (MM/DD/YY): %G%
+ * Time newest applied delta was created (HH:MM:SS): %U%
+ * SCCS file name %F%
+ * Fully qualified SCCS file name:
+ * %P%
+ * Copyright:
+ * (C) COPYRIGHT MOTOROLA, INC. 1996
+ * ALL RIGHTS RESERVED
+ * Notes:
+ * History:
+ * Date Who
+ *
+ * 10/24/96 Rob Baxter
+ * Initial release.
+ *
+ */
+
+#define VPD_EEPROM_SIZE 256 /* EEPROM size in bytes */
+
+/*
+ * packet tuple identifiers
+ *
+ * 0x0D - 0xBF reserved
+ * 0xC0 - 0xFE user defined
+ */
+#define VPD_PID_GI 0x00 /* guaranteed illegal */
+#define VPD_PID_PID 0x01 /* product identifier (ASCII) */
+#define VPD_PID_FAN 0x02 /* factory assembly-number (ASCII) */
+#define VPD_PID_SN 0x03 /* serial-number (ASCII) */
+#define VPD_PID_PCO 0x04 /* product configuration options(binary) */
+#define VPD_PID_ICS 0x05 /* internal clock speed in HZ (integer) */
+#define VPD_PID_ECS 0x06 /* external clock speed in HZ (integer) */
+#define VPD_PID_RCS 0x07 /* reference clock speed in HZ(integer) */
+#define VPD_PID_EA 0x08 /* ethernet address (binary) */
+#define VPD_PID_MT 0x09 /* microprocessor type (ASCII) */
+#define VPD_PID_CRC 0x0A /* EEPROM CRC (integer) */
+#define VPD_PID_FMC 0x0B /* FLASH memory configuration (binary) */
+#define VPD_PID_VLSI 0x0C /* VLSI revisions/versions (binary) */
+#define VPD_PID_TERM 0xFF /* termination */
+
+/*
+ * VPD structure (format)
+ */
+#define VPD_EYE_SIZE 8 /* eyecatcher size */
+typedef struct vpd_header
+{
+ uchar eyecatcher[VPD_EYE_SIZE]; /* eyecatcher - "MOTOROLA" */
+ ushort size; /* size of EEPROM */
+} vpd_header_t;
+
+#define VPD_DATA_SIZE (VPD_EEPROM_SIZE-sizeof(vpd_header_t))
+typedef struct vpd
+{
+ vpd_header_t header; /* header */
+ uchar packets[VPD_DATA_SIZE]; /* data */
+} vpd_t;
+
+/*
+ * packet tuple structure (format)
+ */
+typedef struct vpd_packet
+{
+ uchar identifier; /* identifier (PIDs above) */
+ uchar size; /* size of the following data area */
+ uchar data[1]; /* data (size is dependent upon PID) */
+} vpd_packet_t;
+
+/*
+ * MBX product configuration options bit definitions
+ *
+ * Notes:
+ * 1. The bit numbering is reversed in perspective with the C compiler.
+ */
+#define PCO_BBRAM (1<<0) /* battery-backed RAM (BBRAM) and socket */
+#define PCO_BOOTROM (1<<1) /* boot ROM and socket (i.e., socketed FLASH) */
+#define PCO_KAPWR (1<<2) /* keep alive power source (lithium battey) and control circuit */
+#define PCO_ENET_TP (1<<3) /* ethernet twisted pair (TP) connector (RJ45) */
+#define PCO_ENET_AUI (1<<4) /* ethernet attachment unit interface (AUI) header */
+#define PCO_PCMCIA (1<<5) /* PCMCIA socket */
+#define PCO_DIMM (1<<6) /* DIMM module socket */
+#define PCO_DTT (1<<7) /* digital thermometer and thermostat (DTT) device */
+#define PCO_LCD (1<<8) /* liquid crystal display (LCD) device */
+#define PCO_PCI (1<<9) /* PCI-Bus bridge device (QSpan) and ISA-Bus bridge device (Winbond) */
+#define PCO_PCIO (1<<10) /* PC I/O (COM1, COM2, FDC, LPT, Keyboard/Mouse) */
+#define PCO_EIDE (1<<11) /* enhanced IDE (EIDE) header */
+#define PCO_FDC (1<<12) /* floppy disk controller (FDC) header */
+#define PCO_LPT_8XX (1<<13) /* parallel port header via MPC8xx */
+#define PCO_LPT_PCIO (1<<14) /* parallel port header via PC I/O */
+
+/*
+ * FLASH memory configuration packet data
+ */
+typedef struct vpd_fmc
+{
+ ushort mid; /* manufacturer's idenitfier */
+ ushort did; /* manufacturer's device idenitfier */
+ uchar ddw; /* device data width (e.g., 8-bits, 16-bits) */
+ uchar nod; /* number of devices present */
+ uchar noc; /* number of columns */
+ uchar cw; /* column width in bits */
+ uchar wedw; /* write/erase data width */
+} vpd_fmc_t;
+
+/* function prototypes */
+extern void vpd_init(void);
+extern int vpd_read(uint iic_device, uchar *buf, int count, int offset);
+extern vpd_packet_t *vpd_find_packet(u_char ident);
+
+#endif /* __vpd_h */