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| author | Chris Packham <judge.packham@gmail.com> | 2022-11-05 17:24:00 +1300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2022-11-07 07:46:28 +0100 |
| commit | 6cc8b5db40b4d5fc23086a5116bdf1f0a3d3265a (patch) | |
| tree | f5d23fbb3154e990063229e819c1b46dfb399241 /board/Marvell | |
| parent | 7d7bb99e22783cfee4ecd078d054fcc4cd2948cb (diff) | |
| download | u-boot-6cc8b5db40b4d5fc23086a5116bdf1f0a3d3265a.zip u-boot-6cc8b5db40b4d5fc23086a5116bdf1f0a3d3265a.tar.gz u-boot-6cc8b5db40b4d5fc23086a5116bdf1f0a3d3265a.tar.bz2 | |
arm: mvebu: Add RD-AC5X board
The RD-AC5X-32G16HVG6HLG-A0 development board main components and
features include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1 pcs)
* PCB co-layout with 4GB device to support 8GB (Dual CS) requirement
* 16GB eMMC (Samsung KLMAG1JETD-B041006)
* 16MB SPI NOR(GD25Q127C)
* 32 x 1000 Base-T interfaces
* 16 x 2500 Base-T interfaces
* SR1: 88E2540*4
* SR2: 88E2580*1+88E2540*2
* Six (6) x 25G Base-R SFP28 interfaces
* One (1) x RJ-45 console connector, interfacing to the on board UART
* One (1) x USB Type-A connector, interfacing to the USB 2.0 port (0)
* One (1) x USB Type-mini B connector, interfacing to the USB 2.0 port (1)
* One (1) x RJ-45 1G Base-T Management port, interfacing to the host
port (shared with PCIe) Connected to 88E1512 Gigabit Ethernet Phy
* One (1) x Oculink port, interfacing to the PCIe port for external CPU
connection
* POE 802.3AT support on Port 1 ~ Port 32, 802.3BT support on Port 33 ~
Port 48 (Microsemi PD69208T4, PD69208M or TI TPS2388,TPS23881
solution)
* POE total power budget 780W
* LED interfaces per network port/POE
* LED interfaces (common) showing system status
* PTP TC mode Supported (Reserved M.2 connector to support BC mode)
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'board/Marvell')
| -rw-r--r-- | board/Marvell/mvebu_alleycat-5/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/Marvell/mvebu_alleycat-5/Makefile | 3 | ||||
| -rw-r--r-- | board/Marvell/mvebu_alleycat-5/board.c | 13 |
3 files changed, 22 insertions, 0 deletions
diff --git a/board/Marvell/mvebu_alleycat-5/MAINTAINERS b/board/Marvell/mvebu_alleycat-5/MAINTAINERS new file mode 100644 index 0000000..480c07c --- /dev/null +++ b/board/Marvell/mvebu_alleycat-5/MAINTAINERS @@ -0,0 +1,6 @@ +RD-AC5X BOARD +M: Chris Packham <chris.packham@alliedtelesis.co.nz> +S: Maintained +F: board/Marvell/mvebu_alleycat-5/ +F: include/configs/mvebu_alleycat-5.h +F: configs/mvebu_ac5_rd_defconfig diff --git a/board/Marvell/mvebu_alleycat-5/Makefile b/board/Marvell/mvebu_alleycat-5/Makefile new file mode 100644 index 0000000..29254b4 --- /dev/null +++ b/board/Marvell/mvebu_alleycat-5/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := board.o diff --git a/board/Marvell/mvebu_alleycat-5/board.c b/board/Marvell/mvebu_alleycat-5/board.c new file mode 100644 index 0000000..619cd6c --- /dev/null +++ b/board/Marvell/mvebu_alleycat-5/board.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} |