aboutsummaryrefslogtreecommitdiff
path: root/board/AndesTech
diff options
context:
space:
mode:
authorrick <rick@andestech.com>2017-05-18 14:37:53 +0800
committerAndes <uboot@andestech.com>2017-05-22 14:05:46 +0800
commitb841b6e94662b3b21a56d6ecaab64dcdfb0d311c (patch)
tree92847f53ffaeb104754e2940b32b981314627750 /board/AndesTech
parentf5076f869855045e527de7f1367c65f55a2b1448 (diff)
downloadu-boot-b841b6e94662b3b21a56d6ecaab64dcdfb0d311c.zip
u-boot-b841b6e94662b3b21a56d6ecaab64dcdfb0d311c.tar.gz
u-boot-b841b6e94662b3b21a56d6ecaab64dcdfb0d311c.tar.bz2
nds32: Support AE3XX platform.
Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
Diffstat (limited to 'board/AndesTech')
-rw-r--r--board/AndesTech/adp-ae3xx/Kconfig18
-rw-r--r--board/AndesTech/adp-ae3xx/MAINTAINERS6
-rw-r--r--board/AndesTech/adp-ae3xx/Makefile8
-rw-r--r--board/AndesTech/adp-ae3xx/adp-ae3xx.c86
-rw-r--r--board/AndesTech/adp-ag101p/adp-ag101p.c9
5 files changed, 126 insertions, 1 deletions
diff --git a/board/AndesTech/adp-ae3xx/Kconfig b/board/AndesTech/adp-ae3xx/Kconfig
new file mode 100644
index 0000000..8ec69d6
--- /dev/null
+++ b/board/AndesTech/adp-ae3xx/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_ADP_AE3XX
+
+config SYS_CPU
+ default "n1213"
+
+config SYS_BOARD
+ default "adp-ae3xx"
+
+config SYS_VENDOR
+ default "AndesTech"
+
+config SYS_SOC
+ default "ae3xx"
+
+config SYS_CONFIG_NAME
+ default "adp-ae3xx"
+
+endif
diff --git a/board/AndesTech/adp-ae3xx/MAINTAINERS b/board/AndesTech/adp-ae3xx/MAINTAINERS
new file mode 100644
index 0000000..02e5a19
--- /dev/null
+++ b/board/AndesTech/adp-ae3xx/MAINTAINERS
@@ -0,0 +1,6 @@
+ADP-AG101P BOARD
+M: Andes <uboot@andestech.com>
+S: Maintained
+F: board/AndesTech/adp-ae3xx/
+F: include/configs/adp-ae3xx.h
+F: configs/adp-ae3xx_defconfig
diff --git a/board/AndesTech/adp-ae3xx/Makefile b/board/AndesTech/adp-ae3xx/Makefile
new file mode 100644
index 0000000..842dfb4
--- /dev/null
+++ b/board/AndesTech/adp-ae3xx/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2016 Andes Technology Corporation
+# Rick Chen, Andes Technology Corporation <rick@andestech.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := adp-ae3xx.o
diff --git a/board/AndesTech/adp-ae3xx/adp-ae3xx.c b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
new file mode 100644
index 0000000..ab174fa
--- /dev/null
+++ b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#if defined(CONFIG_FTMAC100)
+#include <netdev.h>
+#endif
+#include <linux/io.h>
+#include <faraday/ftsdc010.h>
+#include <faraday/ftsmc020.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+int board_init(void)
+{
+ /*
+ * refer to BOOT_PARAMETER_PA_BASE within
+ * "linux/arch/nds32/include/asm/misc_spec.h"
+ */
+ printf("Board: %s\n" , CONFIG_SYS_BOARD);
+ gd->bd->bi_arch_number = MACH_TYPE_ADPAE3XX;
+ gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
+ return 0;
+}
+
+int dram_init(void)
+{
+ unsigned long sdram_base = PHYS_SDRAM_0;
+ unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
+ unsigned long actual_size;
+ actual_size = get_ram_size((void *)sdram_base, expected_size);
+ gd->ram_size = actual_size;
+ if (expected_size != actual_size) {
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+ }
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+#if defined(CONFIG_FTMAC100)
+int board_eth_init(bd_t *bd)
+{
+ return ftmac100_initialize(bd);
+}
+#endif
+
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ if (banknum == 0) { /* non-CFI boot flash */
+ info->portwidth = FLASH_CFI_8BIT;
+ info->chipwidth = FLASH_CFI_BY8;
+ info->interface = FLASH_CFI_X8;
+ return 1;
+ } else {
+ return 0;
+ }
+}
+
+int board_mmc_init(bd_t *bis)
+{
+#ifndef CONFIG_DM_MMC
+#ifdef CONFIG_FTSDC010
+ ftsdc010_mmc_init(0);
+#endif
+#endif
+ return 0;
+}
diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c
index 805a266..0fd6fb0 100644
--- a/board/AndesTech/adp-ag101p/adp-ag101p.c
+++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
@@ -7,8 +7,10 @@
*/
#include <common.h>
+#if defined(CONFIG_FTMAC100)
#include <netdev.h>
-#include <asm/io.h>
+#endif
+#include <linux/io.h>
#include <faraday/ftsdc010.h>
#include <faraday/ftsmc020.h>
@@ -25,6 +27,7 @@ int board_init(void)
* refer to BOOT_PARAMETER_PA_BASE within
* "linux/arch/nds32/include/asm/misc_spec.h"
*/
+ printf("Board: %s\n" , CONFIG_SYS_BOARD);
gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
@@ -59,10 +62,12 @@ int dram_init_banksize(void)
return 0;
}
+#if defined(CONFIG_FTMAC100)
int board_eth_init(bd_t *bd)
{
return ftmac100_initialize(bd);
}
+#endif
ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
@@ -78,6 +83,8 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
int board_mmc_init(bd_t *bis)
{
+#ifdef CONFIG_FTSDC010
ftsdc010_mmc_init(0);
+#endif
return 0;
}