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| author | Kevin Chen <kevin_chen@aspeedtech.com> | 2023-08-03 16:12:18 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-08-17 16:39:20 -0400 |
| commit | fe85863086b1dba3cd266b984f6a882522af5790 (patch) | |
| tree | 8f4c99fa4ec9eee5aeeb89cfab953ad0be2df5c3 /arch | |
| parent | 726a802fdaf1ffb4ca95ebf6910a738781137ef5 (diff) | |
| download | u-boot-fe85863086b1dba3cd266b984f6a882522af5790.zip u-boot-fe85863086b1dba3cd266b984f6a882522af5790.tar.gz u-boot-fe85863086b1dba3cd266b984f6a882522af5790.tar.bz2 | |
armv8: Skip PIE in SPL due to load alignment fault.
When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start
and _rel_dyn_end symbol to be loaded to and executed at a
different address than it was linked at.
u-boot-spl.lds is used in SPL build, but relocation information
section(.rela*) were discarded.
In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds
/DISCARD/ : { *(.rela*) }
If PIE enabled in SPL, __rel_dyn_start which is defined as
.rel_dyn_start in sections.c will be apended to the end of
.bss section.
In our ASPEED case, size of .bss section would let .rel_dyn_start
without 8-byte alignment, leading to alignment fault when
executing ldp instuction in pie_fix_loop.
Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index f3ea858..6cc1d26 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -58,7 +58,7 @@ reset: .globl save_boot_params_ret save_boot_params_ret: -#if CONFIG_POSITION_INDEPENDENT +#if CONFIG_POSITION_INDEPENDENT && !defined(CONFIG_SPL_BUILD) /* Verify that we're 4K aligned. */ adr x0, _start ands x0, x0, #0xfff |