Merge tag 'v2023.07-rc6' into next

Prepare v2023.07-rc6

20 files changed, 80 insertions, 62 deletions

diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index ffe3511..1e16b89 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -20,6 +20,7 @@
 #include <irq_func.h>
 #include <asm/cache.h>
 #include <asm/system.h>
+#include <asm/arm11.h>
 
 static void cache_flush(void);
 
@@ -43,6 +44,11 @@ int cleanup_before_linux (void)
 	return 0;
 }
 
+void allow_unaligned(void)
+{
+	arm11_arch_cp15_allow_unaligned();
+}
+
 static void cache_flush(void)
 {
 	unsigned long i = 0;
diff --git a/arch/arm/cpu/arm11/sctlr.S b/arch/arm/cpu/arm11/sctlr.S
index 74a7fc4..8722f83 100644
--- a/arch/arm/cpu/arm11/sctlr.S
+++ b/arch/arm/cpu/arm11/sctlr.S
@@ -8,7 +8,7 @@
 #include <linux/linkage.h>
 
 /*
- * void allow_unaligned(void) - allow unaligned access
+ * void arm11_arch_cp15_allow_unaligned(void) - allow unaligned access
  *
  * This routine sets the enable unaligned data support flag and clears the
  * aligned flag in the system control register.
@@ -16,10 +16,10 @@
  * data abort or undefined behavior but is handled by the CPU.
  * For details see the "ARM Architecture Reference Manual" for ARMv6.
  */
-ENTRY(allow_unaligned)
+ENTRY(arm11_arch_cp15_allow_unaligned)
 	mrc	p15, 0, r0, c1, c0, 0	@ load system control register
 	orr	r0, r0, #1 << 22	@ set unaligned data support flag
 	bic	r0, r0, #2		@ clear aligned flag
 	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
 	bx	lr			@ return
-ENDPROC(allow_unaligned)
+ENDPROC(arm11_arch_cp15_allow_unaligned)
diff --git a/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
index c108736..cf65e8c 100644
--- a/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
@@ -36,6 +36,7 @@ SECTIONS
 	. = ALIGN(4);
 	__image_copy_end = .;
 	_end = .;
+	_image_binary_end = .;
 
 	.bss :
 	{
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 68807d2..6259ffa 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -83,3 +83,8 @@ int cleanup_before_linux(void)
 {
 	return cleanup_before_linux_select(CBL_ALL);
 }
+
+void allow_unaligned(void)
+{
+	v7_arch_cp15_allow_unaligned();
+}
diff --git a/arch/arm/cpu/armv7/sctlr.S b/arch/arm/cpu/armv7/sctlr.S
index bd56e41..d44b214 100644
--- a/arch/arm/cpu/armv7/sctlr.S
+++ b/arch/arm/cpu/armv7/sctlr.S
@@ -8,15 +8,15 @@
 #include <linux/linkage.h>
 
 /*
- * void allow_unaligned(void) - allow unaligned access
+ * void v7_arch_cp15_allow_unaligned(void) - allow unaligned access
  *
  * This routine clears the aligned flag in the system control register.
  * After calling this routine unaligned access does no longer lead to a
  * data abort but is handled by the CPU.
  */
-ENTRY(allow_unaligned)
+ENTRY(v7_arch_cp15_allow_unaligned)
 	mrc	p15, 0, r0, c1, c0, 0	@ load system control register
 	bic	r0, r0, #2		@ clear aligned flag
 	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
 	bx	lr			@ return
-ENDPROC(allow_unaligned)
+ENDPROC(v7_arch_cp15_allow_unaligned)
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
index 306a4dd..fb7a789 100644
--- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
@@ -45,6 +45,7 @@ SECTIONS
 	. = ALIGN(4);
 	__image_copy_end = .;
 	_end = .;
+	_image_binary_end = .;
 
 	.bss :
 	{
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 7fd5a05..035282b 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -81,7 +81,9 @@
 
 		fit {
 			description = "Configuration to load ATF before U-Boot";
+#ifndef CONFIG_IMX_HAB
 			fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+#endif
 			fit,fdt-list = "of-list";
 			#address-cells = <1>;
 
diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
index cef20da..5046b38 100644
--- a/arch/arm/dts/imx8mn-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-u-boot.dtsi
@@ -145,7 +145,9 @@
 
 		fit {
 			description = "Configuration to load ATF before U-Boot";
+#ifndef CONFIG_IMX_HAB
 			fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+#endif
 			fit,fdt-list = "of-list";
 			#address-cells = <1>;
 
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 18d1728..68cd0e1 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -103,7 +103,9 @@
 
 		fit {
 			description = "Configuration to load ATF before U-Boot";
+#ifndef CONFIG_IMX_HAB
 			fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+#endif
 			fit,fdt-list = "of-list";
 			#address-cells = <1>;
 
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index b3fef86..90b2274 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -97,7 +97,9 @@
 
 		fit {
 			description = "Configuration to load ATF before U-Boot";
+#ifndef CONFIG_IMX_HAB
 			fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+#endif
 			#address-cells = <1>;
 
 			images {
diff --git a/arch/arm/include/asm/arm11.h b/arch/arm/include/asm/arm11.h
new file mode 100644
index 0000000..5276f73
--- /dev/null
+++ b/arch/arm/include/asm/arm11.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+#ifndef ARM11_H
+#define ARM11_H
+
+#ifndef __ASSEMBLY__
+void arm11_arch_cp15_allow_unaligned(void);
+#endif /* ! __ASSEMBLY__ */
+
+#endif	/* ARM11_H */
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 2fb824b..c002998 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -156,6 +156,7 @@ void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
 				 u32 cpu_rev);
 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
 			  u32 cpu_variant, u32 cpu_rev);
+void v7_arch_cp15_allow_unaligned(void);
 #endif /* ! __ASSEMBLY__ */
 
 #endif
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 616621a..5ea7e26 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -24,7 +24,7 @@
 
 int arch_cpu_init(void)
 {
-#if defined(CONFIG_CLK_CCF)
+#if defined(CONFIG_CLK_CCF) || defined(CONFIG_CLK_SCMI)
 	return 0;
 #else
 	return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 702cfc3..488638c 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -510,3 +510,7 @@ char nxp_board_rev_string(void)
 	return (*rev + nxp_board_rev() - 1);
 }
 #endif
+
+__weak void reset_cpu(void)
+{
+}
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index c6747b2..439cdaf 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -932,10 +932,10 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 	printf("ivt entry = 0x%08x, dcd = 0x%08x, csf = 0x%08x\n", ivt->entry,
 	       ivt->dcd, ivt->csf);
 	puts("Dumping IVT\n");
-	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
+	print_buffer(ivt_addr, (void *)(uintptr_t)(ivt_addr), 4, 0x8, 0);
 
 	puts("Dumping CSF Header\n");
-	print_buffer(ivt->csf, (void *)(ivt->csf), 4, 0x10, 0);
+	print_buffer(ivt->csf, (void *)(uintptr_t)(ivt->csf), 4, 0x10, 0);
 
 #if  !defined(CONFIG_SPL_BUILD)
 	get_hab_status();
@@ -944,7 +944,7 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 	puts("\nCalling authenticate_image in ROM\n");
 	printf("\tivt_offset = 0x%x\n", ivt_offset);
 	printf("\tstart = 0x%08lx\n", start);
-	printf("\tbytes = 0x%x\n", bytes);
+	printf("\tbytes = 0x%lx\n", (ulong)bytes);
 #endif
 
 #ifndef CONFIG_ARM64
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index cb9801b..6c13b00 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -20,6 +20,7 @@
 #include <asm/mach-imx/boot_mode.h>
 #include <g_dnl.h>
 #include <linux/libfdt.h>
+#include <memalign.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -315,47 +316,21 @@ ulong board_spl_fit_size_align(ulong size)
 	size = ALIGN(size, 0x1000);
 	size += CONFIG_CSF_SIZE;
 
-	return size;
-}
+	if (size > CONFIG_SYS_BOOTM_LEN)
+		panic("spl: ERROR: image too big\n");
 
-void board_spl_fit_post_load(const void *fit)
-{
-	u32 offset = ALIGN(fdt_totalsize(fit), 0x1000);
-
-	if (imx_hab_authenticate_image((uintptr_t)fit,
-				       offset + IVT_SIZE + CSF_PAD_SIZE,
-				       offset)) {
-		panic("spl: ERROR:  image authentication unsuccessful\n");
-	}
+	return size;
 }
 #endif
 
 void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
 {
-	int align_len = ARCH_DMA_MINALIGN - 1;
-
-	/* Some devices like SDP, NOR, NAND, SPI are using bl_len =1, so their fit address
-	 * is different with SD/MMC, this cause mismatch with signed address. Thus, adjust
-	 * the bl_len to align with SD/MMC.
-	 */
-	if (bl_len < 512)
-		bl_len = 512;
-
-	return  (void *)((CONFIG_TEXT_BASE - fit_size - bl_len -
-			align_len) & ~align_len);
-}
+#if defined(CONFIG_SPL_LOAD_FIT_ADDRESS)
+	return (void *)CONFIG_SPL_LOAD_FIT_ADDRESS;
+#else
+	return (void *)(CONFIG_TEXT_BASE + CONFIG_SYS_BOOTM_LEN);
 #endif
-
-#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = imx_ddr_size();
-
-	return 0;
 }
-#endif
-
 /*
  * read the address where the IVT header must sit
  * from IVT image header, loaded from SPL into
@@ -365,7 +340,6 @@ int dram_init_banksize(void)
 void *spl_load_simple_fit_fix_load(const void *fit)
 {
 	struct ivt *ivt;
-	unsigned long new;
 	unsigned long offset;
 	unsigned long size;
 	u8 *tmp = (u8 *)fit;
@@ -375,16 +349,23 @@ void *spl_load_simple_fit_fix_load(const void *fit)
 	size = board_spl_fit_size_align(size);
 	tmp += offset;
 	ivt = (struct ivt *)tmp;
-	if (ivt->hdr.magic != IVT_HEADER_MAGIC) {
-		debug("no IVT header found\n");
-		return (void *)fit;
-	}
+
 	debug("%s: ivt: %p offset: %lx size: %lx\n", __func__, ivt, offset, size);
 	debug("%s: ivt self: %x\n", __func__, ivt->self);
-	new = ivt->self;
-	new -= offset;
-	debug("%s: new %lx\n", __func__, new);
-	memcpy((void *)new, fit, size);
 
-	return (void *)new;
+	if (imx_hab_authenticate_image((uintptr_t)fit, (uintptr_t)ivt, offset))
+		panic("spl: ERROR: image authentication unsuccessful\n");
+
+	return (void *)fit;
 }
+#endif /* CONFIG_IMX_HAB */
+
+#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = imx_ddr_size();
+
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index 3596b82..b7d5f13 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -34,15 +34,15 @@ config TARGET_ROCK5B_RK3588
 	  4x ARM Cortex-A76, 4x ARM Cortex-A55
 	  4/8/16GB memory LPDDR4x
 	  Mali G610MC4 GPU
-	  MIPI CSI 2 multiple lanes connector
+	  2x MIPI CSI 2 multiple lanes connector
 	  eMMC module connector
 	  uSD slot (up to 128GB)
-	  2x USB 2.0, 2x USB 3.0
-	  2x HDMI output, 1x HDMI input
-	  Ethernet port
+	  2x USB 2.0 Type-A, 2x USB 3.0 Type-A, 1x USB 3.0 Type-C
+	  2x HDMI 2.1 output, 1x micro HDMI input
+	  2.5 Gbps Ethernet port
 	  40-pin IO header including UART, SPI, I2C and 5V DC power in
 	  USB PD over USB Type-C
-	  Size: 85mm x 54mm
+	  Size: 100mm x 72mm (Pico-ITX form factor)
 
 config ROCKCHIP_BOOT_MODE_REG
 	default 0xfd588080
diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds
index 4ac5a21..5970951 100644
--- a/arch/microblaze/cpu/u-boot-spl.lds
+++ b/arch/microblaze/cpu/u-boot-spl.lds
@@ -54,6 +54,7 @@ SECTIONS
 		__bss_end = .;
 	}
 	_end = . ;
+	_image_binary_end = .;
 }
 
 #if defined(CONFIG_SPL_MAX_FOOTPRINT)
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index b304026..f0e20da 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -15,7 +15,7 @@
 #if !CONFIG_IS_ENABLED(SYSRESET)
 void __weak _machine_restart(void)
 {
-	fprintf(stderr, "*** reset failed ***\n");
+	puts("*** reset failed ***\n");
 
 	while (1)
 		/* NOP */;
diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds
index 15b5cbc..2ffe6ba 100644
--- a/arch/riscv/cpu/u-boot.lds
+++ b/arch/riscv/cpu/u-boot.lds
@@ -48,7 +48,7 @@ SECTIONS
 		KEEP(*(SORT(__u_boot_list*)));
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	.efi_runtime_rel : {
 		__efi_runtime_rel_start = .;
@@ -57,8 +57,6 @@ SECTIONS
 		__efi_runtime_rel_stop = .;
 	}
 
-	. = ALIGN(8);
-
 	/DISCARD/ : { *(.rela.plt*) }
 	.rela.dyn : {
 		__rel_dyn_start = .;