diff options
author | Simon Glass <sjg@chromium.org> | 2023-07-15 21:39:11 -0600 |
---|---|---|
committer | Bin Meng <bmeng@tinylab.org> | 2023-07-17 17:23:14 +0800 |
commit | e2e7de874766a1e7b21a7174bf88efa2ef6b6e56 (patch) | |
tree | 61c0db7b91b4caf891391154c323f0ded21404c1 /arch | |
parent | 6a324897825acdd54f31aeebfe0d29b7f6ab4d86 (diff) | |
download | u-boot-e2e7de874766a1e7b21a7174bf88efa2ef6b6e56.zip u-boot-e2e7de874766a1e7b21a7174bf88efa2ef6b6e56.tar.gz u-boot-e2e7de874766a1e7b21a7174bf88efa2ef6b6e56.tar.bz2 |
x86: Convert some debug statements to use logging
Move from using debug() to log_debug() so that we don't have to use the
__func__ parameter and can access other logging features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/cpu/intel_common/mrc.c | 10 | ||||
-rw-r--r-- | arch/x86/cpu/ivybridge/sdram.c | 4 | ||||
-rw-r--r-- | arch/x86/lib/mrccache.c | 6 | ||||
-rw-r--r-- | arch/x86/lib/spl.c | 22 |
4 files changed, 26 insertions, 16 deletions
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index 69405d7..56cc253 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -3,6 +3,8 @@ * Copyright (c) 2016 Google, Inc */ +#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <init.h> @@ -144,12 +146,10 @@ int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap) ret = gpio_request_list_by_name(dev, "board-id-gpios", desc, ARRAY_SIZE(desc), GPIOD_IS_IN); - if (ret < 0) { - debug("%s: gpio ret=%d\n", __func__, ret); - return ret; - } + if (ret < 0) + return log_msg_ret("gpio", ret); spd_index = dm_gpio_get_values_as_int(desc, ret); - debug("spd index %d\n", spd_index); + log_debug("spd index %d\n", spd_index); node = fdt_first_subnode(blob, dev_of_offset(dev)); if (node < 0) diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 1a0ec43..0718aef 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -9,6 +9,8 @@ * Copyright (C) 2011 Google Inc. */ +#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <errno.h> @@ -213,7 +215,7 @@ static int copy_spd(struct udevice *dev, struct pei_data *peid) ret = mrc_locate_spd(dev, sizeof(peid->spd_data[0]), &data); if (ret) { - debug("%s: Could not locate SPD (ret=%d)\n", __func__, ret); + log_debug("Could not locate SPD (err=%d)\n", ret); return ret; } diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 2f6f688..6494b8d 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -6,6 +6,8 @@ * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com> */ +#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <errno.h> @@ -197,8 +199,8 @@ static void mrccache_setup(struct mrc_output *mrc, void *data) cache->signature = MRC_DATA_SIGNATURE; cache->data_size = mrc->len; checksum = compute_ip_checksum(mrc->buf, cache->data_size); - debug("Saving %d bytes for MRC output data, checksum %04x\n", - cache->data_size, checksum); + log_debug("Saving %d bytes for MRC output data, checksum %04x\n", + cache->data_size, checksum); cache->checksum = checksum; cache->reserved = 0; memcpy(cache->data, mrc->buf, cache->data_size); diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 92a5e6a..ba3434b 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -3,6 +3,8 @@ * Copyright (c) 2016 Google, Inc */ +#define LOG_CATEGORY LOGC_BOOT + #include <common.h> #include <cpu_func.h> #include <debug_uart.h> @@ -76,25 +78,25 @@ static int x86_spl_init(void) #endif int ret; - debug("%s starting\n", __func__); + log_debug("x86 spl starting\n"); if (IS_ENABLED(TPL)) ret = x86_cpu_reinit_f(); else ret = x86_cpu_init_f(); ret = spl_init(); if (ret) { - debug("%s: spl_init() failed\n", __func__); + log_debug("spl_init() failed (err=%d)\n", ret); return ret; } ret = arch_cpu_init(); if (ret) { - debug("%s: arch_cpu_init() failed\n", __func__); + log_debug("arch_cpu_init() failed (err=%d)\n", ret); return ret; } #ifndef CONFIG_TPL ret = fsp_setup_pinctrl(NULL, NULL); if (ret) { - debug("%s: fsp_setup_pinctrl() failed\n", __func__); + log_debug("fsp_setup_pinctrl() failed (err=%d)\n", ret); return ret; } #endif @@ -108,23 +110,25 @@ static int x86_spl_init(void) #if !defined(CONFIG_TPL) && !CONFIG_IS_ENABLED(CPU) ret = print_cpuinfo(); if (ret) { - debug("%s: print_cpuinfo() failed\n", __func__); + log_debug("print_cpuinfo() failed (err=%d)\n", ret); return ret; } #endif ret = dram_init(); if (ret) { - debug("%s: dram_init() failed\n", __func__); + log_debug("dram_init() failed (err=%d)\n", ret); return ret; } + log_debug("mrc\n"); if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { ret = mrccache_spl_save(); if (ret) - debug("%s: Failed to write to mrccache (err=%d)\n", - __func__, ret); + log_debug("Failed to write to mrccache (err=%d)\n", + ret); } #ifndef CONFIG_SYS_COREBOOT + log_debug("bss\n"); debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); @@ -145,6 +149,7 @@ static int x86_spl_init(void) gd->new_gd = (struct global_data *)ptr; memcpy(gd->new_gd, gd, sizeof(*gd)); + log_debug("logging\n"); /* * Make sure logging is disabled when we switch, since the log system * list head will move @@ -184,6 +189,7 @@ static int x86_spl_init(void) debug("Failed to set CPU frequency (err=%d)\n", ret); # endif #endif + log_debug("done\n"); return 0; } |