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| author | Wadim Egorov <w.egorov@phytec.de> | 2017-07-18 11:53:10 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-07-27 14:59:01 +0200 |
| commit | c03635c3d14c5402229fcfacedbbdff48f3de221 (patch) | |
| tree | 241ad25484b870ab24e75a7b552b538c9b1ce9a3 /arch | |
| parent | 3641d346eab75e183cbde10d6aa5d77d870477ed (diff) | |
| download | u-boot-c03635c3d14c5402229fcfacedbbdff48f3de221.zip u-boot-c03635c3d14c5402229fcfacedbbdff48f3de221.tar.gz u-boot-c03635c3d14c5402229fcfacedbbdff48f3de221.tar.bz2 | |
rockchip: phycore: Add ID page of M24C32-D EEPROM
The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.
phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.
Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rk3288-phycore-som.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi index fd463f4..02d1196 100644 --- a/arch/arm/dts/rk3288-phycore-som.dtsi +++ b/arch/arm/dts/rk3288-phycore-som.dtsi @@ -61,6 +61,7 @@ aliases { rtc0 = &i2c_rtc; rtc1 = &rk818; + eeprom0 = &i2c_eeprom_id; }; ext_gmac: external-gmac-clock { @@ -383,6 +384,13 @@ pagesize = <32>; }; + /* M24C32-D Identification page */ + i2c_eeprom_id: eeprom@58 { + compatible = "atmel,24c32"; + reg = <0x58>; + pagesize = <32>; + }; + vdd_cpu: regulator@60 { compatible = "fcs,fan53555"; reg = <0x60>; |