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authorAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>2015-11-05 17:21:37 +0530
committerMichal Simek <michal.simek@xilinx.com>2016-04-13 18:29:05 +0200
commitac8f6913c4269663f3d61e1a4b9b52b2d9b1bb31 (patch)
treec020c63cdc9a13099452a05dc798a0538573cc40 /arch
parent85d1142eb6cf1bc7f89fdbf67ba228896e158e0d (diff)
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ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts
This patch adds the sata port phy OOB timing values in the sata device-tree node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/zynqmp-ep108.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 7fa0694..e48a360 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -105,6 +105,15 @@
&sata {
status = "okay";
ceva,broken-gen2;
+ /* SATA Phy OOB timing settings */
+ ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+ ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+ ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+ ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
+ ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
+ ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
+ ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
+ ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
};
&sdhci0 {