diff options
author | Pavel Machek <pavel@denx.de> | 2014-07-14 14:14:17 +0200 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2014-08-30 07:46:38 -0400 |
commit | 99b97106f3d2ff89af70559fdfa0360ac22c536c (patch) | |
tree | c749c495c3b58d00cd6d7374b900867aba6319a2 /arch | |
parent | 3ab019e1dc39c69ae7fd0e15b080ef6c59cd138f (diff) | |
download | u-boot-99b97106f3d2ff89af70559fdfa0360ac22c536c.zip u-boot-99b97106f3d2ff89af70559fdfa0360ac22c536c.tar.gz u-boot-99b97106f3d2ff89af70559fdfa0360ac22c536c.tar.bz2 |
socfpga: initialize designware ethernet
Enable initialization fo designware ethernet controller. With this
patch, ethernet works in my configuration, provided I set ethernet
address in the environment.
Signed-off-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv7/socfpga/misc.c | 17 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h | 2 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index 5268f2c..ecae393 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -6,6 +6,8 @@ #include <common.h> #include <asm/io.h> +#include <miiphy.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -38,3 +40,18 @@ int misc_init_r(void) { return 0; } + + +/* + * DesignWare Ethernet initialization + */ +int cpu_eth_init(bd_t *bis) +{ +#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD) + /* initialize and register the emac */ + return designware_initialize(CONFIG_EMAC_BASE, + CONFIG_PHY_INTERFACE_MODE); +#else + return 0; +#endif +} diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index 5f73824..2d3152d 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -16,5 +16,7 @@ #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 #define SOCFPGA_SCANMGR_ADDRESS 0xfff02000 +#define SOCFPGA_EMAC0_ADDRESS 0xff700000 +#define SOCFPGA_EMAC1_ADDRESS 0xff702000 #endif /* _SOCFPGA_BASE_ADDRS_H_ */ |