x86: Rename existing FSP code to fsp1

Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.

Add a Kconfig which defines which version is in use.

Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

24 files changed, 37 insertions, 13 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 218e817..314f8de 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -364,6 +364,29 @@ config HAVE_FSP
 	  Note: Without this binary U-Boot will not be able to set up its
 	  SDRAM so will not boot.
 
+choice
+	prompt "FSP version"
+	depends on HAVE_FSP
+	default FSP_VERSION1
+	help
+	  Selects the FSP version to use. Intel has published several versions
+	  of the FSP External Architecture Specification and this allows
+	  selection of the version number used by a particular SoC.
+
+config FSP_VERSION1
+	bool "FSP version 1.x"
+	help
+	  This covers versions 1.0 and 1.1a. See here for details:
+	  https://github.com/IntelFsp/fsp/wiki
+
+config FSP_VERSION2
+	bool "FSP version 2.x"
+	help
+	  This covers versions 2.0 and 2.1. See here for details:
+	  https://github.com/IntelFsp/fsp/wiki
+
+endchoice
+
 config FSP_FILE
 	string "Firmware Support Package binary filename"
 	depends on HAVE_FSP
@@ -429,7 +452,7 @@ config ENABLE_MRC_CACHE
 
 	  For platforms that use Intel FSP for the memory initialization,
 	  please check FSP output HOB via U-Boot command 'fsp hob' to see
-	  if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
+	  if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp1/fsp_hob.h).
 	  If such GUID does not exist, MRC cache is not available on such
 	  platform (eg: Intel Queensbay), which means selecting this option
 	  here does not make any difference.
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 445e4ba..1e3829a 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -167,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
  * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses
  * of these two blocks are programmed by either U-Boot or FSP.
  *
- * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S)
+ * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S)
  * on Intel BayTrail SoC already initializes these two base addresses so
  * we are safe to access these registers here.
  */
diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c
index cefd262..5b5d66a 100644
--- a/arch/x86/cpu/baytrail/fsp_configs.c
+++ b/arch/x86/cpu/baytrail/fsp_configs.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c
index 7fe6fa7..607e333 100644
--- a/arch/x86/cpu/braswell/fsp_configs.c
+++ b/arch/x86/cpu/braswell/fsp_configs.c
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c
index 2fd06b3..773c2b2 100644
--- a/arch/x86/cpu/ivybridge/fsp_configs.c
+++ b/arch/x86/cpu/ivybridge/fsp_configs.c
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c
index c4d1177..0dd1901 100644
--- a/arch/x86/cpu/queensbay/fsp_configs.c
+++ b/arch/x86/cpu/queensbay/fsp_configs.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 void update_fsp_configs(struct fsp_config_data *config,
 			struct fspinit_rtbuf *rt_buf)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 76556fc..66737e6 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -12,7 +12,7 @@
 #include <asm/post.h>
 #include <asm/arch/device.h>
 #include <asm/arch/tnc.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/processor.h>
 
 static int __maybe_unused disable_igd(void)
diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp1/fsp_api.h
index f2d7079..f2d7079 100644
--- a/arch/x86/include/asm/fsp/fsp_api.h
+++ b/arch/x86/include/asm/fsp1/fsp_api.h
diff --git a/arch/x86/include/asm/fsp/fsp_azalia.h b/arch/x86/include/asm/fsp1/fsp_azalia.h
index e59180b..e59180b 100644
--- a/arch/x86/include/asm/fsp/fsp_azalia.h
+++ b/arch/x86/include/asm/fsp1/fsp_azalia.h
diff --git a/arch/x86/include/asm/fsp/fsp_bootmode.h b/arch/x86/include/asm/fsp1/fsp_bootmode.h
index bc96ec3..bc96ec3 100644
--- a/arch/x86/include/asm/fsp/fsp_bootmode.h
+++ b/arch/x86/include/asm/fsp1/fsp_bootmode.h
diff --git a/arch/x86/include/asm/fsp/fsp_ffs.h b/arch/x86/include/asm/fsp1/fsp_ffs.h
index b7558e5..b7558e5 100644
--- a/arch/x86/include/asm/fsp/fsp_ffs.h
+++ b/arch/x86/include/asm/fsp1/fsp_ffs.h
diff --git a/arch/x86/include/asm/fsp/fsp_fv.h b/arch/x86/include/asm/fsp1/fsp_fv.h
index 511dfb7..511dfb7 100644
--- a/arch/x86/include/asm/fsp/fsp_fv.h
+++ b/arch/x86/include/asm/fsp1/fsp_fv.h
diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp1/fsp_hob.h
index 3bb79c4..3bb79c4 100644
--- a/arch/x86/include/asm/fsp/fsp_hob.h
+++ b/arch/x86/include/asm/fsp1/fsp_hob.h
diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp1/fsp_infoheader.h
index 86f7801..86f7801 100644
--- a/arch/x86/include/asm/fsp/fsp_infoheader.h
+++ b/arch/x86/include/asm/fsp1/fsp_infoheader.h
diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h
index 7b92392..7b92392 100644
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp1/fsp_support.h
diff --git a/arch/x86/include/asm/fsp/fsp_types.h b/arch/x86/include/asm/fsp1/fsp_types.h
index 3d5b17e..3d5b17e 100644
--- a/arch/x86/include/asm/fsp/fsp_types.h
+++ b/arch/x86/include/asm/fsp1/fsp_types.h
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index c252192..2466ad2 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -74,7 +74,7 @@ u32 isa_map_rom(u32 bus_addr, int size);
 /* arch/x86/lib/... */
 int video_bios_init(void);
 
-/* arch/x86/lib/fsp/... */
+/* arch/x86/lib/fsp1,2/... */
 
 /**
  * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 906be5e..a8c7448 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -43,7 +43,8 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CMD_ZBOOT)	+= zimage.o
 endif
 obj-$(CONFIG_USE_HOB) += hob.o
-obj-$(CONFIG_HAVE_FSP) += fsp/
+obj-$(CONFIG_FSP_VERSION1) += fsp1/
+obj-$(CONFIG_FSP_VERSION2) += fsp2/
 
 ifdef CONFIG_SPL_BUILD
 ifdef CONFIG_TPL_BUILD
diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp1/Makefile
index 870de71..870de71 100644
--- a/arch/x86/lib/fsp/Makefile
+++ b/arch/x86/lib/fsp1/Makefile
diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp1/fsp_car.S
index 8c54cea..8c54cea 100644
--- a/arch/x86/lib/fsp/fsp_car.S
+++ b/arch/x86/lib/fsp1/fsp_car.S
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index ed0827c..591eef7 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -14,7 +14,7 @@
 #include <asm/mrccache.h>
 #include <asm/post.h>
 #include <asm/processor.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c
index 3a23b70..3bf65b4 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp1/fsp_dram.c
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/e820.h>
 #include <asm/mrccache.h>
 #include <asm/post.h>
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp1/fsp_graphics.c
index 91d2d08..52e7133 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp1/fsp_graphics.c
@@ -7,7 +7,7 @@
 #include <dm.h>
 #include <vbe.h>
 #include <video.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c
index 0eaa9b2..019a42f 100644
--- a/arch/x86/lib/fsp/fsp_support.c
+++ b/arch/x86/lib/fsp1/fsp_support.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/post.h>
 
 struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void)