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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2021-05-07 14:50:34 +0200
committerTom Rini <trini@konsulko.com>2021-06-07 10:48:40 -0400
commit7dc6068fc10d699558176da364a3e7a6cfccdaa1 (patch)
tree4e0f600b3731b037d15c1d446a61818d9a1d4b1f /arch
parentf46959cef4360960103d84467b82a56d56152fe4 (diff)
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stm32mp: Increase the reserved memory in board_get_usable_ram_top
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...) mapped cacheable before relocation. Without this patch the device tree, located before the MALLOC area is not tagged cacheable just after relocation, before mmu reconfiguration. This patch reduces the duration for device tree parsing in lmb_init_and_reserve. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-stm32mp/dram_init.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index 66e81ba..3c09702 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -50,13 +50,16 @@ ulong board_get_usable_ram_top(ulong total_size)
lmb_init(&lmb);
lmb_add(&lmb, gd->ram_base, gd->ram_size);
boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
- size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
+ /* add 8M for reserved memory for display, fdt, gd,... */
+ size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
if (!reg)
reg = gd->ram_top - size;
- mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
+ /* before relocation, mark the U-Boot memory as cacheable by default */
+ if (!(gd->flags & GD_FLG_RELOC))
+ mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
return reg + size;
}