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| author | Tom Rini <trini@konsulko.com> | 2018-02-16 13:55:51 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-02-16 13:55:51 -0500 |
| commit | 7961b9f6db19d039b4e6e9c21a9715b6d5b92393 (patch) | |
| tree | 89a9a4b62a4777d14fa53dae053117af72e9ab0a /arch | |
| parent | fee626c4498b032c19cadc2633cea40badc74625 (diff) | |
| parent | fef4a545b696daf7f27f176aae82fd47b1174aba (diff) | |
| download | u-boot-7961b9f6db19d039b4e6e9c21a9715b6d5b92393.zip u-boot-7961b9f6db19d039b4e6e9c21a9715b6d5b92393.tar.gz u-boot-7961b9f6db19d039b4e6e9c21a9715b6d5b92393.tar.bz2 | |
Merge git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 7 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria5_socdk.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_cyclone5_is1.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 |
5 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7b618d6..77cb200 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -698,16 +698,17 @@ config ARCH_SOCFPGA select OF_CONTROL select SPL_OF_CONTROL select DM - select DM_SPI_FLASH - select DM_SPI select ENABLE_ARM_SOC_BOOT0_HOOK select ARCH_EARLY_INIT_R select ARCH_MISC_INIT - select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION select SYS_THUMB_BUILD imply CMD_MTDPARTS imply CRC32_VERIFY + imply DM_SPI + imply DM_SPI_FLASH imply FAT_WRITE + imply HW_WATCHDOG + imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs" diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 1e91a65..4e4b619 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -88,7 +88,7 @@ u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "n25q00", "spi-flash"; reg = <0>; /* chip select */ spi-max-frequency = <50000000>; m25p,fast-read; diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts index 2e2b71f..ea323a1 100644 --- a/arch/arm/dts/socfpga_cyclone5_is1.dts +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts @@ -87,7 +87,7 @@ u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "n25q00", "spi-flash"; reg = <0>; /* chip select */ spi-max-frequency = <100000000>; m25p,fast-read; diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 95a8e65..3af5113 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -98,7 +98,7 @@ u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "n25q00", "spi-flash"; reg = <0>; /* chip select */ spi-max-frequency = <100000000>; m25p,fast-read; diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index e3ae8a8..e612eee 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -68,7 +68,7 @@ flash0: n25q00@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "n25q00", "spi-flash"; reg = <0>; /* chip select */ spi-max-frequency = <50000000>; m25p,fast-read; |