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authorClément Léger <clement.leger@bootlin.com>2022-03-31 10:55:08 +0200
committerEugen Hristev <eugen.hristev@microchip.com>2022-04-01 15:42:46 +0300
commit757647313dd69324c5a01125b5ce9664058fee50 (patch)
tree1fae4525579d36e5f93f4c4c49d4219c477e2371 /arch
parentd29e55a6c23dac4b8dc51e1fbd19037c4deaf35b (diff)
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ARM: dts: at91: sama5d2: add TCB node
Add the device-tree node to describe the TCB timer. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/sama5d2.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 7de58e4..058009a 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -1,4 +1,5 @@
#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Atmel SAMA5D2 family SoC";
@@ -639,6 +640,21 @@
status = "disabled";
};
+ tcb0: timer@f800c000 {
+ compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+ reg = <0xf800c000 0x100>;
+ interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
+ clock-names = "t0_clk", "gclk", "slow_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ timer0: timer@0 {
+ compatible = "atmel,tcb-timer";
+ reg = <0>, <1>;
+ };
+ };
+
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;