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authorKishon Vijay Abraham I <kishon@ti.com>2018-01-30 16:01:48 +0100
committerJaehoon Chung <jh80.chung@samsung.com>2018-02-19 16:58:55 +0900
commit6ba41e5dc320c3983d90808e172bd15fdd4abdf4 (patch)
tree265ebd55f4f242d07609aea778774893e43da9c1 /arch
parent2022270c7ddaaad1e1c4e78e5d03e4df0a8ce222 (diff)
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ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically added for dra7 and dra72. This is required since for dra7 and dra72 processors iodelay values has to be set unlike other processors. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/dra7.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi
index 02a136a..9061843 100644
--- a/arch/arm/dts/dra7.dtsi
+++ b/arch/arm/dts/dra7.dtsi
@@ -1056,7 +1056,7 @@
};
mmc1: mmc@4809c000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
@@ -1070,7 +1070,7 @@
};
mmc2: mmc@480b4000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
@@ -1082,7 +1082,7 @@
};
mmc3: mmc@480ad000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
@@ -1095,7 +1095,7 @@
};
mmc4: mmc@480d1000 {
- compatible = "ti,omap4-hsmmc";
+ compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";