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| author | Andre Przywara <andre.przywara@arm.com> | 2024-05-10 00:43:18 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2024-07-15 18:11:13 +0100 |
| commit | 51bee9b5a349b5f39ed39f650e07d16a1b22004f (patch) | |
| tree | c2e38bdb763a75d73e16449c18f49157bc0b7912 /arch | |
| parent | 5e8af847215969d8675252411bbb386ca8fee91d (diff) | |
| download | u-boot-51bee9b5a349b5f39ed39f650e07d16a1b22004f.zip u-boot-51bee9b5a349b5f39ed39f650e07d16a1b22004f.tar.gz u-boot-51bee9b5a349b5f39ed39f650e07d16a1b22004f.tar.bz2 | |
power: pmic: sunxi: add AXP717 SPL support
On boards using the AXP717 PMIC, the DRAM rail is often not setup
correctly at reset time, so we have to program the PMIC very early in
the SPL, before running the DRAM initialisation.
Using the new generic AXP SPL driver, add the Kconfig options and
platform bits needed to support an AXP717 PMIC chip in I2C mode.
This allows to set up the correct voltage for the DRAM chips and the
CPU cores.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Ryan Walklin <ryan@testtoast.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-sunxi/pmic_bus.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index 87df312..8e19324 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -19,6 +19,7 @@ #define AXP152_I2C_ADDR 0x30 #define AXP209_I2C_ADDR 0x34 +#define AXP717_I2C_ADDR 0x34 #define AXP305_I2C_ADDR 0x36 #define AXP313_I2C_ADDR 0x36 @@ -36,6 +37,8 @@ static int pmic_i2c_address(void) return AXP305_I2C_ADDR; if (IS_ENABLED(CONFIG_AXP313_POWER)) return AXP313_I2C_ADDR; + if (IS_ENABLED(CONFIG_AXP717_POWER)) + return AXP717_I2C_ADDR; /* Other AXP2xx and AXP8xx variants */ return AXP209_I2C_ADDR; |