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| author | Bin Meng <bmeng.cn@gmail.com> | 2017-10-18 18:20:58 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-10-27 15:13:47 +0800 |
| commit | 4c9f4c5ee4ac15a285f3ceb25752432990084dc1 (patch) | |
| tree | 888bdf20b196b5be16e6976d2d0d422cfd858ccd /arch | |
| parent | ab20107468de5bf6b9affa93b17f2284cc838b5b (diff) | |
| download | u-boot-4c9f4c5ee4ac15a285f3ceb25752432990084dc1.zip u-boot-4c9f4c5ee4ac15a285f3ceb25752432990084dc1.tar.gz u-boot-4c9f4c5ee4ac15a285f3ceb25752432990084dc1.tar.bz2 | |
x86: braswell: cherryhill: Update dts for SPI lock down
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/braswell/Kconfig | 4 | ||||
| -rw-r--r-- | arch/x86/dts/cherryhill.dts | 1 |
2 files changed, 1 insertions, 4 deletions
diff --git a/arch/x86/cpu/braswell/Kconfig b/arch/x86/cpu/braswell/Kconfig index 616f228..31ac279 100644 --- a/arch/x86/cpu/braswell/Kconfig +++ b/arch/x86/cpu/braswell/Kconfig @@ -31,8 +31,4 @@ config FSP_ADDR hex default 0xfff20000 -config FSP_LOCKDOWN_SPI - bool - default y - endif diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 840a669..41e72f3 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -143,6 +143,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich9-spi"; + intel,spi-lock-down; spi-flash@0 { #address-cells = <1>; |