diff options
| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:33:12 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-14 16:00:24 -0500 |
| commit | 45c18853d8bfb6c4e12d6e19c5391e5978a2f524 (patch) | |
| tree | 5e91e4823304d900f8d7ffc076b5a6e40ea6be14 /arch | |
| parent | cd7ad629960bf53eb2d7247ce1d499770b316116 (diff) | |
| download | u-boot-45c18853d8bfb6c4e12d6e19c5391e5978a2f524.zip u-boot-45c18853d8bfb6c4e12d6e19c5391e5978a2f524.tar.gz u-boot-45c18853d8bfb6c4e12d6e19c5391e5978a2f524.tar.bz2 | |
powerpc/mpc85xx: Update corenet global utility block registers
Fix ccsr_gur for corenet platform. Remove non-exist registers. Add fuse
status register.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index baaa9fe..3711f51 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1676,18 +1676,17 @@ typedef struct cpc_corenet { /* Global Utilities Block */ #ifdef CONFIG_FSL_CORENET typedef struct ccsr_gur { - u32 porsr1; /* POR status */ - u8 res1[28]; + u32 porsr1; /* POR status 1 */ + u32 porsr2; /* POR status 2 */ + u8 res_008[0x20-0x8]; u32 gpporcr1; /* General-purpose POR configuration */ - u8 res2[12]; - u32 gpiocr; /* GPIO control */ - u8 res3[12]; - u32 gpoutdr; /* General-purpose output data */ - u8 res4[12]; - u32 gpindr; /* General-purpose input data */ - u8 res5[12]; - u32 alt_pmuxcr; /* Alt function signal multiplex control */ - u8 res6[12]; + u32 gpporcr2; /* General-purpose POR configuration 2 */ + u32 dcfg_fusesr; /* Fuse status register */ +#define FSL_CORENET_DCFG_FUSESR_VID_SHIFT 25 +#define FSL_CORENET_DCFG_FUSESR_VID_MASK 0x1F +#define FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT 20 +#define FSL_CORENET_DCFG_FUSESR_ALTVID_MASK 0x1F + u8 res_02c[0x70-0x2c]; u32 devdisr; /* Device disable control */ u32 devdisr2; /* Device disable control 2 */ u32 devdisr3; /* Device disable control 3 */ |