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authorBin Meng <bmeng.cn@gmail.com>2023-07-31 07:56:02 -0600
committerBin Meng <bmeng.cn@gmail.com>2023-08-01 10:06:46 +0800
commit41fbb344695f224d70d3c469ea418015279ba55e (patch)
tree06f97df03ef571baa9fc3814900393b176e991fc /arch
parent4e619e8d4fd68095bc665a78f2651d8e478a4534 (diff)
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x86: Change testing logic of mtrr commit
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/lib/init_helpers.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index f331940..60a2707 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -21,8 +21,7 @@ int init_cache_f_r(void)
/*
* Supported configurations:
*
- * booting from slimbootloader - in that case the MTRRs are already set
- * up
+ * booting from slimbootloader - MTRRs are already set up
* booting with FSPv1 - MTRRs are already set up
* booting with FSPv2 - MTRRs must be set here
* booting from coreboot - in this case there is no SPL, so we set up
@@ -30,8 +29,7 @@ int init_cache_f_r(void)
* Note: if there is an SPL, then it has already set up MTRRs so we
* don't need to do that here
*/
- do_mtrr &= !IS_ENABLED(CONFIG_SPL) &&
- !IS_ENABLED(CONFIG_FSP_VERSION1) &&
+ do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) &&
!IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER);
if (do_mtrr) {