Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/28Oct2021

- mvebu: Fix usage of BIN header arguments (Pali)
- mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali)
- mvebu: nandpagesize support for kwbimage v1 (Pali)

3 files changed, 12 insertions, 3 deletions

diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in
index 72e67d7..049d23c 100644
--- a/arch/arm/mach-mvebu/kwbimage.cfg.in
+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in
@@ -9,4 +9,4 @@ VERSION		1
 #@BOOT_FROM
 
 # Binary Header (bin_hdr) with DDR3 training code
-BINARY spl/u-boot-spl.bin 0000005b 00000068
+BINARY spl/u-boot-spl.bin
diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S
index dde77b7..501c239 100644
--- a/arch/arm/mach-mvebu/lowlevel_spl.S
+++ b/arch/arm/mach-mvebu/lowlevel_spl.S
@@ -3,6 +3,15 @@
 #include <config.h>
 #include <linux/linkage.h>
 
+/*
+ * BootROM loads the header part of kwbimage into L2 cache. BIN header usually
+ * contains U-Boot SPL, optionally it can also contain additional arguments.
+ * The number of these arguments is in r0, pointer to the argument array in r1.
+ * BootROM expects executable BIN header code to return to address stored in lr.
+ * Other registers (r2 - r12) must be preserved. We save all registers to
+ * CONFIG_SPL_BOOTROM_SAVE address. BIN header arguments (passed via r0 and r1)
+ * are currently not used by U-Boot SPL binary.
+ */
 ENTRY(save_boot_params)
 	stmfd	sp!, {r0 - r12, lr}	/* @ save registers on stack */
 	ldr	r12, =CONFIG_SPL_BOOTROM_SAVE
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index b798c79..cad3f0a 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -72,11 +72,11 @@
 #define IBR_HDR_UART_ID			0x69
 #define IBR_HDR_SDIO_ID			0xAE
 
-/* Structure of the main header, version 1 (Armada 370/38x/XP) */
+/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
 struct kwbimage_main_hdr_v1 {
 	uint8_t  blockid;               /* 0x0       */
 	uint8_t  flags;                 /* 0x1       */
-	uint16_t reserved2;             /* 0x2-0x3   */
+	uint16_t nandpagesize;          /* 0x2-0x3   */
 	uint32_t blocksize;             /* 0x4-0x7   */
 	uint8_t  version;               /* 0x8       */
 	uint8_t  headersz_msb;          /* 0x9       */