From 701769d87ea3006103c93fd0ecc26875e02d461f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 21 Oct 2021 16:46:08 +0200 Subject: arm: mvebu: Add documentation for save_boot_params() function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Important detail is availability of kwbimage BIN header arguments passed via r0 and r1 registers by BootROM. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/lowlevel_spl.S | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S index dde77b7..501c239 100644 --- a/arch/arm/mach-mvebu/lowlevel_spl.S +++ b/arch/arm/mach-mvebu/lowlevel_spl.S @@ -3,6 +3,15 @@ #include #include +/* + * BootROM loads the header part of kwbimage into L2 cache. BIN header usually + * contains U-Boot SPL, optionally it can also contain additional arguments. + * The number of these arguments is in r0, pointer to the argument array in r1. + * BootROM expects executable BIN header code to return to address stored in lr. + * Other registers (r2 - r12) must be preserved. We save all registers to + * CONFIG_SPL_BOOTROM_SAVE address. BIN header arguments (passed via r0 and r1) + * are currently not used by U-Boot SPL binary. + */ ENTRY(save_boot_params) stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */ ldr r12, =CONFIG_SPL_BOOTROM_SAVE -- cgit v1.1 From e6571f38c943f7ff1ed38b90940d1265f6c7b9ba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 21 Oct 2021 16:46:09 +0200 Subject: arm: mvebu: Remove dummy BIN header arguments for SPL binary MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot SPL binary does not read BIN header arguments, so passing some dummy values 0000005b and 00000068 has no effect for U-Boot SPL code. Probably these two values comes from old Marvell DDR training code which was separated from U-Boot and used it for some configuration. Seems that two 32-bit values were specified here to ensure SPL code alignment to 128-bit boundary as it is required e.g. for A370 or AXP processors. Main kwbimage header is 64-byte long which is aligned to 128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header arguments is stored in 32-bit number. So for alignment to 128-bit boundary is needed 64-bit padding which exactly these two 32-bit dummy arguments provided. Now when mkimage correctly aligns start of executable code in BIN header to 128-bit boundary, there is no requirement to put dummy argument values into kwbimage. So remove them. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/kwbimage.cfg.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in index 72e67d7..049d23c 100644 --- a/arch/arm/mach-mvebu/kwbimage.cfg.in +++ b/arch/arm/mach-mvebu/kwbimage.cfg.in @@ -9,4 +9,4 @@ VERSION 1 #@BOOT_FROM # Binary Header (bin_hdr) with DDR3 training code -BINARY spl/u-boot-spl.bin 0000005b 00000068 +BINARY spl/u-boot-spl.bin -- cgit v1.1 From 33cdd9eeaaff48d083af5c0126823348c2b44d97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 22 Oct 2021 12:37:48 +0200 Subject: arm: mvebu: Update name of kwbimage v1 field at offset 0x2-0x3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At this offset is stored nand page size. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index b798c79..27389bf 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -76,7 +76,7 @@ struct kwbimage_main_hdr_v1 { uint8_t blockid; /* 0x0 */ uint8_t flags; /* 0x1 */ - uint16_t reserved2; /* 0x2-0x3 */ + uint16_t nandpagesize; /* 0x2-0x3 */ uint32_t blocksize; /* 0x4-0x7 */ uint8_t version; /* 0x8 */ uint8_t headersz_msb; /* 0x9 */ -- cgit v1.1 From 7af368f4717a2c4b118f8cae597e268dc88a726c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 22 Oct 2021 12:41:10 +0200 Subject: arm: mvebu: Fix comments about kwbimage structures MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit kwbimage v1 is used on more SoCs. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 27389bf..cad3f0a 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -72,7 +72,7 @@ #define IBR_HDR_UART_ID 0x69 #define IBR_HDR_SDIO_ID 0xAE -/* Structure of the main header, version 1 (Armada 370/38x/XP) */ +/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */ struct kwbimage_main_hdr_v1 { uint8_t blockid; /* 0x0 */ uint8_t flags; /* 0x1 */ -- cgit v1.1