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| author | Simon Glass <sjg@chromium.org> | 2020-04-08 16:57:24 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-04-16 14:36:28 +0800 |
| commit | 32e8ee004a3dad1a9cc06bd3ac44d8ba562afc3e (patch) | |
| tree | 9002c802bbd751fdea0db4d7bbfc559742c474ce /arch/x86/dts | |
| parent | fe6831dac40bde3e2c764f451334072b6cbefb45 (diff) | |
| download | u-boot-32e8ee004a3dad1a9cc06bd3ac44d8ba562afc3e.zip u-boot-32e8ee004a3dad1a9cc06bd3ac44d8ba562afc3e.tar.gz u-boot-32e8ee004a3dad1a9cc06bd3ac44d8ba562afc3e.tar.bz2 | |
tpm: cr50: Use the correct GPIO binding
This device should use ready-gpios rather than ready-gpio. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/chromebook_coral.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index af52e11..d48ef35 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -292,7 +292,7 @@ reg = <0x50>; compatible = "google,cr50"; u-boot,i2c-offset-len = <0>; - ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>; + ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>; interrupts-extended = <&acpi_gpe 0x3c 0>; }; }; |