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author | Wolfgang Wallner <wolfgang.wallner@br-automation.com> | 2020-01-22 16:01:47 +0100 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-04 12:54:54 +0800 |
commit | 03fe85a27b23c609233100ccbab1617d78a73d84 (patch) | |
tree | d8ec9b29fdb063d279b4cfe012b34f1e40b6f55b /arch/x86/dts | |
parent | 1d5bf32f0feaac806f85f128befd619cc81e7e08 (diff) | |
download | u-boot-03fe85a27b23c609233100ccbab1617d78a73d84.zip u-boot-03fe85a27b23c609233100ccbab1617d78a73d84.tar.gz u-boot-03fe85a27b23c609233100ccbab1617d78a73d84.tar.bz2 |
x86: itss: Remove apl-prefix
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts')
-rw-r--r-- | arch/x86/dts/chromebook_coral.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 24fcbb5..a1820fa 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -171,7 +171,7 @@ itss { u-boot,dm-pre-reloc; - compatible = "intel,apl-itss"; + compatible = "intel,itss"; intel,p2sb-port-id = <PID_ITSS>; intel,pmc-routes = < PMC_GPE_SW_31_0 GPIO_GPE_SW_31_0 |