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| author | Wolfgang Wallner <wolfgang.wallner@br-automation.com> | 2020-02-04 09:04:56 +0100 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-07 22:41:24 +0800 |
| commit | 2999846c112712ec3bcd4f1937006dd62d3b20e3 (patch) | |
| tree | fc39f27046ad319424c24eeceba4af41e28ace5a /arch/x86/Kconfig | |
| parent | 8a6ffeda97dfda5263ef40e1a4efb25b032ce04c (diff) | |
| download | u-boot-2999846c112712ec3bcd4f1937006dd62d3b20e3.zip u-boot-2999846c112712ec3bcd4f1937006dd62d3b20e3.tar.gz u-boot-2999846c112712ec3bcd4f1937006dd62d3b20e3.tar.bz2 | |
x86: Move P2SB from Apollo Lake to a more generic location
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b733d22..b3fbf30 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -715,6 +715,13 @@ config HAVE_ITSS Select this to include the driver for the Interrupt Timer Subsystem (ITSS) which is found on several Intel devices. +config HAVE_P2SB + bool "Enable P2SB" + help + Select this to include the driver for the Primary to + Sideband Bridge (P2SB) which is found on several Intel + devices. + menu "System tables" depends on !EFI && !SYS_COREBOOT |