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authorRick Chen <rick@andestech.com>2019-04-30 13:49:33 +0800
committerAndes <uboot@andestech.com>2019-05-09 16:46:46 +0800
commitbdce38965e79143ed58bf1c6d39c650ff3dfefd1 (patch)
treedfb6c4288f22c176838ace87fed0949dd747a7dc /arch/riscv/lib/smp.c
parent8aa278df0a338dfc05c731589051ab80373925c5 (diff)
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riscv: Introduce CONFIG_XIP to support booting from flash
When U-Boot boots from flash, during the boot process, hart_lottery and available_harts_lock variable addresses point to flash which is not writable. This causes boot failures on AE350. Introduce a config option CONFIG_XIP to support such configuration. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/lib/smp.c')
-rw-r--r--arch/riscv/lib/smp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index caa292c..cc66f15 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -63,9 +63,11 @@ static int send_ipi_many(struct ipi_data *ipi)
continue;
}
+#ifndef CONFIG_XIP
/* skip if hart is not available */
if (!(gd->arch.available_harts & (1 << reg)))
continue;
+#endif
gd->arch.ipi[reg].addr = ipi->addr;
gd->arch.ipi[reg].arg0 = ipi->arg0;